Functional Verification

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Discussion

Setting vhdl tb generic using irun command

Category: Functional Verification

By itsonlyme
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updated over 11 years ago by itsonlyme

8 replies • 18901 views
Discussion

How can I dump waveform using irun uder UVM environment

Category: Functional Verification

By bbpfancy
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updated over 11 years ago by StephenH

1 replies • 17257 views
Discussion

Breakpoints in simvision(Incisiv Simulator)

Category: Functional Verification

By subrahmanya
•
updated over 11 years ago by subrahmanya

2 replies • 2883 views
Discussion

ncprotect when using user-defined keys

Category: Functional Verification

By James Bailey
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started over 11 years ago

0 replies • 14965 views
Discussion

Functional Coverage Question

Category: Functional Verification

By ashfaqh
•
updated over 11 years ago by StephenH

2 replies • 15357 views
Discussion

In UVM is there any Inheritance like "Specman e when Inheritance"..

Category: Functional Verification

By Selvavinayak
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updated over 11 years ago by Tudor Timi

1 replies • 1192 views
Discussion

Bind SVA to VHDL Enumerated Type

Category: Functional Verification

By rlanier
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updated over 11 years ago by Tudor Timi

1 replies • 14304 views
Discussion

Problem when running simulation with Verilog-AMS and SystemVerilog together with irun

Category: Functional Verification

By solomonchoi
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updated over 11 years ago by StephenH

3 replies • 19894 views
Discussion

Black boxing issue in IFV

Category: Functional Verification

By niraj10
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updated over 11 years ago by StephenH

1 replies • 13394 views
Discussion

I can't find "Part Manager" option in OrCad 16.3

Category: Functional Verification

By cimo
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updated over 11 years ago by AniketM

5 replies • 7507 views
Discussion

Envelop Following Analyses for Switching Amplifiers

Category: Functional Verification

By Mazia
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started over 11 years ago

0 replies • 12671 views
Discussion

Passing parameters form verilog to systemC

Category: Functional Verification

By jbriquet
•
updated over 11 years ago by jbriquet

1 replies • 13422 views
Discussion

UVM Sequence

Category: Functional Verification

By DesignVerif
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updated over 11 years ago by DesignVerif

4 replies • 14328 views
Discussion

Error on CLSMIP

Category: Functional Verification

By DesignVerif
•
updated over 11 years ago by DesignVerif

4 replies • 14618 views
Discussion

Weird error in ncvhdl

Category: Functional Verification

By sebgimi
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updated over 11 years ago by ttran0671

4 replies • 14606 views

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