Hardware/Software Co-Development, Verification and Integration

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need solution for following error in cadence RTL synthesis tool

Category: Hardware/Software Co-Development, Verification and Integration

By aathi27

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updated over 12 years ago by StephenH

1 replies • 14363 views
Discussion

Simulating Solar cells in PSPICE‏‏‏

Category: Hardware/Software Co-Development, Verification and Integration

By wiebesolar

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updated over 12 years ago by wiebesolar

2 replies • 15060 views
Discussion

Why do I get an error when I try to generate (any) system Verilog module?

Category: Hardware/Software Co-Development, Verification and Integration

By giorgiaz

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started over 12 years ago

0 replies • 13500 views
Discussion

Generate HSPICE subckt from OCEAN

Category: Hardware/Software Co-Development, Verification and Integration

By AlexOrange

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started over 12 years ago

0 replies • 13898 views
Discussion

Need help....about schematic and foot print

Category: Hardware/Software Co-Development, Verification and Integration

By NEPDEEP

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updated over 12 years ago by oldmouldy

1 replies • 13874 views
Discussion

Chipware equivalent of DW_fp_log2

Category: Hardware/Software Co-Development, Verification and Integration

By in8214

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started over 12 years ago

0 replies • 13975 views
Discussion

Resolver Model PSpice

Category: Hardware/Software Co-Development, Verification and Integration

By Cpereira

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updated over 12 years ago by Alok Tripathi

3 replies • 15927 views
Discussion

Font size of C-to-Silicon GUI

Category: Hardware/Software Co-Development, Verification and Integration

By GiuseppeDG

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updated over 12 years ago by GiuseppeDG

2 replies • 14674 views
Discussion

Incisive commands

Category: Hardware/Software Co-Development, Verification and Integration

By Schmitt

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started over 12 years ago

0 replies • 13683 views
Discussion

Is it possible for VHDL to use a verilog/systemverilog package ?

Category: Hardware/Software Co-Development, Verification and Integration

By Xinwei

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updated over 12 years ago by Xinwei

3 replies • 5019 views
Discussion

schedule crash

Category: Hardware/Software Co-Development, Verification and Integration

By wojtQ

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updated over 12 years ago by wojtQ

2 replies • 14230 views
Discussion

IRUN and PlusArgs

Category: Hardware/Software Co-Development, Verification and Integration

By jlang

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updated over 13 years ago by Xinwei

1 replies • 16883 views
Discussion

pcb

Category: Hardware/Software Co-Development, Verification and Integration

By divya414

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updated over 13 years ago by srmt

1 replies • 13828 views
Discussion

CONFORMAL LEC- MODULES SKIPPED FROM HIER. BCOZ OFEXTRA PORTS AFTER MBIST INSERTION

Category: Hardware/Software Co-Development, Verification and Integration

By SWAROOP24X7

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started over 13 years ago

0 replies • 1181 views
Discussion

Current source equivalent/substitute

Category: Hardware/Software Co-Development, Verification and Integration

By borntonag

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started over 13 years ago

0 replies • 764 views

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