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Mixed-Signal Design

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  • Discussion

    License problems running AMS simulation in ADE GXL

    Category: Mixed-Signal Design

    By Kabal Kabal

    •

    started over 11 years ago

    0 replies • 12775 views
  • Discussion

    Spice

    Category: Mixed-Signal Design

    By sonnet28 sonnet28

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 12815 views
  • Discussion

    How to setup Cadence ADE to simulate basic digital blocks successfully

    Category: Mixed-Signal Design

    By bhl3302 bhl3302

    •

    updated over 11 years ago by marten

    8 replies • 16412 views
  • Discussion

    Differential Non Linearity and Integral Non Linearity for ADCs

    Category: Mixed-Signal Design

    By analogy analogy

    •

    updated over 11 years ago by FormerMember

    5 replies • 15944 views
  • Discussion

    Mixed-signal LVS netlist from schematic

    Category: Mixed-Signal Design

    By bdjones1 bdjones1

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 13984 views
  • Discussion

    ERROR (VACOMP-1008): Cannot compile ahdlcmi module library

    Category: Mixed-Signal Design

    By jsaenznoval jsaenznoval

    •

    updated over 11 years ago by jsaenznoval

    2 replies • 14076 views
  • Discussion

    how to connect signal to a real_vector

    Category: Mixed-Signal Design

    By sebgimi sebgimi

    •

    updated over 11 years ago by Andrew Beckett

    5 replies • 14064 views
  • Discussion

    mixed Signal simulation using Analog schematic and VHDL behaviour code

    Category: Mixed-Signal Design

    By wrensh wrensh

    •

    started over 11 years ago

    0 replies • 12984 views
  • Discussion

    VerilogA in AMS simulation: string parameter is not properly recognized

    Category: Mixed-Signal Design

    By jsaenznoval jsaenznoval

    •

    updated over 11 years ago by jsaenznoval

    2 replies • 14884 views
  • Discussion

    How to use a Hspice model in spectre?

    Category: Mixed-Signal Design

    By Enycin Enycin

    •

    updated over 11 years ago by Enycin

    2 replies • 16535 views
  • Discussion

    Using a Design Variable in an input.scs File

    Category: Mixed-Signal Design

    By Cachi Cachi

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 15790 views
  • Discussion

    Switched Cap based System Noise Analysis

    Category: Mixed-Signal Design

    By Abhishek D Abhishek D

    •

    updated over 11 years ago by Andrew Beckett

    7 replies • 18225 views
  • Discussion

    AMS simulation using ADE. How to save internal verilog module signals.

    Category: Mixed-Signal Design

    By weebey weebey

    •

    started over 11 years ago

    0 replies • 14324 views
  • Discussion

    Which simulator is best to use for Mixed-Signal Simulation?

    Category: Mixed-Signal Design

    By Kabal Kabal

    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 16575 views
  • Discussion

    Defining a string parameter in a systemverilog model as a design variable

    Category: Mixed-Signal Design

    By Soner Soner

    •

    updated over 11 years ago by Soner

    2 replies • 19549 views
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