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Mixed-Signal Design

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  • Discussion

    How to use calcVal for local sweep within the same test?

    Category: Mixed-Signal Design

    By NewScreenName

    •

    started over 3 years ago

    0 replies • 8996 views
  • Discussion

    Hierarchy dump into a file

    Category: Mixed-Signal Design

    By RaghavendraN

    •

    updated over 3 years ago by Saloni Chhabra

    5 replies • 11347 views
  • Discussion

    SKILL script for instance extraction

    Category: Mixed-Signal Design

    By RaghavendraN

    •

    updated over 3 years ago by RaghavendraN

    6 replies • 10470 views
  • Discussion

    No XPS option in ADE

    Category: Mixed-Signal Design

    By sktf

    •

    updated over 3 years ago by sktf

    4 replies • 10330 views
  • Discussion

    I am doing Beh Vs Schematic

    Category: Mixed-Signal Design

    By sharifsharif

    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 9722 views
  • Discussion

    Virtuoso visualization and analysis wiondow does not update in tran analysis

    Category: Mixed-Signal Design

    By NewScreenName

    •

    updated over 3 years ago by ShawnLogan

    3 replies • 10320 views
  • Discussion

    ADE Assembler spec extracted from tran simulation will give error

    Category: Mixed-Signal Design

    By NewScreenName

    •

    updated over 3 years ago by NewScreenName

    2 replies • 9541 views
  • Discussion

    PSS/Pnoise for Correlated Double Samling

    Category: Mixed-Signal Design

    By Ashwin Rebello

    •

    updated over 3 years ago by Ashwin Rebello

    4 replies • 5181 views
  • Discussion

    define different errpreset for different cells in a tran simulation

    Category: Mixed-Signal Design

    By NewScreenName

    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 11144 views
  • Discussion

    data preserving termination of batch run spectre / ADE XL

    Category: Mixed-Signal Design

    By MinersLamp

    •

    started over 3 years ago

    0 replies • 8213 views
  • Discussion

    SystemVerilog AMS simulation (ADE) xmelab ERROR, TYCMPAT: port or terminal connection type check failed on instance (expecting datatype compatible with 'packed array' but found 'unpacked array[0:1] of packed array [3:0] of logic' instead)

    Category: Mixed-Signal Design

    By ADJK

    •

    updated over 3 years ago by Andrew Beckett

    5 replies • 6284 views
  • Discussion

    Verilog-ams generate-for loop with schematic reference

    Category: Mixed-Signal Design

    By SimbaG

    •

    updated over 3 years ago by SimbaG

    1 replies • 10670 views
  • Discussion

    dynamic selection totally freezes layout xl when there are many connectivity warnings

    Category: Mixed-Signal Design

    By tdtg

    •

    updated over 3 years ago by tdtg

    2 replies • 9413 views
  • Discussion

    runams cannot handle environment variables in cds.lib?

    Category: Mixed-Signal Design

    By zdu89

    •

    updated over 3 years ago by Andrew Beckett

    4 replies • 12333 views
  • Discussion

    connectRules for multiple power domain

    Category: Mixed-Signal Design

    By DavidLou

    •

    updated over 3 years ago by DavidLou

    2 replies • 9838 views
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