Mixed-Signal Design

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Discussion

Weird voltage level in verilogA simulation

Category: Mixed-Signal Design

By hafiz2431

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updated over 6 years ago by silviabarnett

2 replies • 14581 views
Discussion

Missing EEnet connect modules

Category: Mixed-Signal Design

By drdanmc

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updated over 6 years ago by Frank Wiedmann

6 replies • 21402 views
Discussion

How to use AMS design flow with standard cell library?

Category: Mixed-Signal Design

By dogrush

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updated over 6 years ago by BijoyKundu

4 replies • 57176 views
Discussion

Simulation of simple Verilog-AMS testbench failed

Category: Mixed-Signal Design

By pyohayo

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updated over 6 years ago by Andrew Beckett

2 replies • 15233 views
Discussion

Simulating CDL netlist in AMS UNL

Category: Mixed-Signal Design

By mayaAMS

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started over 6 years ago

0 replies • 14462 views
Discussion

Plotting a digital bus as an analog signal

Category: Mixed-Signal Design

By mwb1

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updated over 6 years ago by Andrew Beckett

3 replies • 25578 views
Discussion

I/O libraries required from Cadence?

Category: Mixed-Signal Design

By mohammadalizia

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updated over 6 years ago by Andrew Beckett

1 replies • 1186 views
Discussion

Inbuilt math functions for RNM SV modelling of mixed signal blocks

Category: Mixed-Signal Design

By Shanto

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started over 6 years ago

0 replies • 13521 views
Discussion

How to preserve or define real type connection between blocks when generating systemVerilog netlist from schematics

Category: Mixed-Signal Design

By happyy

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started over 6 years ago

0 replies • 14496 views
Discussion

Reading values from struct at the input of SystemVerilog model using AMS simulator.

Category: Mixed-Signal Design

By stagro

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started over 6 years ago

0 replies • 14785 views
Discussion

Using systemVerilog files with AMS simulator

Category: Mixed-Signal Design

By forXTer

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updated over 6 years ago by Andrew Beckett

7 replies • 27046 views
Discussion

measurements on eyediagram

Category: Mixed-Signal Design

By vamshiky

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updated over 6 years ago by vamshiky

8 replies • 19387 views
Discussion

ams simulator vs spectre: empty schematic view

Category: Mixed-Signal Design

By rosinc

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updated over 6 years ago by rosinc

2 replies • 15674 views
Discussion

Error with Calibre PEX using a certain PDK in Cadence Virtuoso

Category: Mixed-Signal Design

By growingmind

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updated over 6 years ago by Andrew Beckett

1 replies • 18167 views
Discussion

SpiceIn netlist->schematic

Category: Mixed-Signal Design

By paulinho

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updated over 6 years ago by Andrew Beckett

1 replies • 1603 views

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