Mixed-Signal Design

Latest Posts

Discussion

Phase Frequency Detector

Category: Mixed-Signal Design

By parultrivedi
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updated over 2 years ago by Andrew Beckett

3 replies • 9461 views
Discussion

bus values in corners

Category: Mixed-Signal Design

By greywanderer
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updated over 2 years ago by greywanderer

2 replies • 6035 views
Discussion

saving bus of nets within an extracted view

Category: Mixed-Signal Design

By NewScreenName
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updated over 2 years ago by NewScreenName

15 replies • 11154 views
Discussion

cds_global varible errors in config mode

Category: Mixed-Signal Design

By Binhngo1210
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updated over 2 years ago by Binhngo1210

2 replies • 6661 views
Discussion

Measure a branch current in Verilog AMS (Probe Command)

Category: Mixed-Signal Design

By Devin Atkin
•
started over 2 years ago

0 replies • 6469 views
Discussion

Modeling transition in SV-RNM

Category: Mixed-Signal Design

By naumel
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started over 2 years ago

0 replies • 5707 views
Discussion

VAA: Vector and Array are not supported simultaneously

Category: Mixed-Signal Design

By bhuvi289
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updated over 2 years ago by Nader Fathy

1 replies • 6373 views
Discussion

Simulation does something odd every 1.5ms

Category: Mixed-Signal Design

By JayBee
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started over 2 years ago

0 replies • 5470 views
Discussion

OT transient operating points in OCEAN

Category: Mixed-Signal Design

By NewScreenName
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updated over 2 years ago by ShawnLogan

3 replies • 7779 views
Discussion

Issues with custom connect rules in AMS simulation

Category: Mixed-Signal Design

By naumel
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started over 2 years ago

0 replies • 5866 views
Discussion

Help: AMS Mixed-signal simulation error reported ERROR (VACOMP-2070)

Category: Mixed-Signal Design

By feiyufox
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updated over 2 years ago by Andrew Beckett

1 replies • 6291 views
Discussion

Measure performance metrics of SV-RNM vs VAMS models

Category: Mixed-Signal Design

By naumel
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updated over 2 years ago by tpylant

1 replies • 6768 views
Discussion

expecting a valid compiler directive error in vams that is not in systemVerilog

Category: Mixed-Signal Design

By MikeVP
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updated over 2 years ago by MikeVP

1 replies • 7263 views
Discussion

Where can i find the analog modeling group or community ?

Category: Mixed-Signal Design

By sharifsharif
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updated over 2 years ago by Andrew Beckett

1 replies • 5893 views
Discussion

SystemVerilog: Assign a array to a bus

Category: Mixed-Signal Design

By HoWei
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updated over 2 years ago by tpylant

3 replies • 9365 views

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