• Discussion

  bindkey's using "Alt" are not working Locked

  1504 views
  1 reply
  Latest over 13 years ago
  by Andrew Beckett
• Discussion

  What's mean critical IC for Design PCB? Locked

  529 views
  0 replies
  Started over 13 years ago
  by Chul
• Discussion

  No parameters in Cdl netlist. Locked

  7209 views
  1 reply
  Latest over 13 years ago
  by Andrew Beckett
• Discussion

  Adding a compiler to custom viewType Locked

  13817 views
  2 replies
  Latest over 13 years ago
  by CDietrich
• Discussion

  Help on menu's Locked

  975 views
  1 reply
  Latest over 13 years ago
  by Andrew Beckett
• Discussion

  nanoroute is not routing the design Locked

  16925 views
  6 replies
  Latest over 13 years ago
  by Satendra
• Discussion

  How to generate the Monte Carlo simulation netlist automatically Locked

  13776 views
  1 reply
  Latest over 13 years ago
  by Andrew Beckett
• Discussion

  Power stripes. Got moved. Not touching the boundary edge. How to catch it. Locked

  14938 views
  3 replies
  Latest over 13 years ago
  by Kari
• Discussion

  Extraction Tech File for characterize_power_library command of EPS Locked

  13987 views
  3 replies
  Latest over 13 years ago
  by Kari
• Discussion

  Printing waveforms in ViVa Locked

  14950 views
  3 replies
  Latest over 13 years ago
  by Andrew Beckett
• Discussion

  FlipChip: create Bump 2 Bump connection with fcroute Locked

  14247 views
  1 reply
  Latest over 13 years ago
  by Kari
• Discussion

  How to select routing layer pitch? Locked

  14246 views
  1 reply
  Latest over 13 years ago
  by Kari
• Discussion

  difficult encounter Locked

  13854 views
  2 replies
  Latest over 13 years ago
  by Kari
• Discussion

  use of SPEF file Locked

  19345 views
  6 replies
  Latest over 13 years ago
  by Kari
• Discussion

  Antenna violation Locked

  13921 views
  1 reply
  Latest over 13 years ago
  by Kari