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  • Discussion

    Problem generating netlist from capture for pcb editor Locked

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    1 reply
    Latest over 15 years ago
    by oldmouldy
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    autodraw option Locked

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    1 reply
    Latest over 15 years ago
    by Quek
  • Discussion

    How to suppress Spectre simulation for digital design? Locked

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    3 replies
    Latest over 15 years ago
    by Quek
  • Discussion

    launching functions

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    3 replies
    Latest over 15 years ago
    by Pieman
  • Discussion

    Odd Shaped Pad Locked

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    5 replies
    Latest over 15 years ago
    by Goblin59
  • Discussion

    Help: memory equivalence check between RTL and schematic Locked

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    3 replies
    Latest over 15 years ago
    by archive
  • Discussion

    Setup - Constraint Manager - Physical - Vias Locked

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    4 replies
    Latest over 15 years ago
    by redwire
  • Discussion

    lec blackbox nonequivalent problem Locked

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    1 reply
    Latest over 15 years ago
    by croy
  • Discussion

    Highlighting features between tool versions Locked

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    3 replies
    Latest over 15 years ago
    by redwire
  • Discussion

    How to fix Noise bump violations in Encounter? Locked

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    1 reply
    Latest over 15 years ago
    by BobD
  • Discussion

    Outputting an IPC Netlist Locked

    16911 views
    1 reply
    Latest over 15 years ago
    by Rik Lee
  • Discussion

    How to make modgen always treat parallel transistors as m-factor Locked

    15790 views
    5 replies
    Latest over 15 years ago
    by Quek
  • Discussion

    Connecting dummy transistors Locked

    17746 views
    3 replies
    Latest over 15 years ago
    by Quek
  • Discussion

    Cadence IC6 How to Get all the data graph Locked

    14077 views
    2 replies
    Latest over 15 years ago
    by Yousuf
  • Discussion

    Drill Table problem Locked

    15096 views
    2 replies
    Latest over 15 years ago
    by shangwu
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