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Forum - Thread List
  • Discussion

    What is the correct way to make a cellview from DSPF file? Locked

    10943 views
    2 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Verilog-A control of temperature for single instances? Locked

    10086 views
    2 replies
    Latest over 3 years ago
    by PistakioKernel
  • Discussion

    toggle entry layer fillstyle between fill and stipple Locked

    10359 views
    4 replies
    Latest over 3 years ago
    by dfink
  • Discussion

    Sigrity – Tip of the week: How to get the faster simulation results in PowerSI Model Extraction workflow

    7749 views
    0 replies
    Started over 3 years ago
    by SimTech
  • Discussion

    AWD plotting commands - _amsaDirectPlot Locked

    4780 views
    8 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    How to store values for the form fields Locked

    10712 views
    2 replies
    Latest over 3 years ago
    by yankunRen
  • Discussion

    how to create a random seed in verilogams with $random Locked

    14315 views
    3 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Spectre failed to complete the simulation with Error ID=5011 Locked

    6797 views
    7 replies
    Latest over 3 years ago
    by FormerMember
  • Discussion

    Module instance name changed to hdl_xx when creating verilog netlist Locked

    12152 views
    5 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Custom vs PNR layout Locked

    9478 views
    1 reply
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    SystemVerilog Outputs Incorrect Real Datatype Number Precision Locked

    11166 views
    2 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Digital components library for CMOSP18 in IC6 or IC5 in transistor level Locked

    10352 views
    6 replies
    Latest over 3 years ago
    by HamedN
  • Discussion

    APS and XPS MS encountered a critical error during simulation Locked

    11806 views
    2 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Crosstalk Analysis and Simulation in High-Speed PCB design

    8195 views
    0 replies
    Started over 3 years ago
    by SimTech
  • Discussion

    PSpice A/D Modelling Application – Create and use models on the fly

    1407 views
    0 replies
    Started over 3 years ago
    by DesignTech
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