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  • Not Answered

    Port Modulation File Format 0

    3604 views
    4 replies
    Latest 10 months ago
    by KG202503214748
  • Discussion

    report_power vs report_gates Locked

    2741 views
    0 replies
    Started 10 months ago
    by DE202502112928
  • Discussion

    How do I install and configure the License AWR - University Program?

    10781 views
    6 replies
    Latest 10 months ago
    by OscPn
  • Discussion

    I want to investigate single-event latchup (SEL) in inverters. How should I modify the Calibre rule deck to extract parasitic BJTs and resistances from the layout Locked

    2646 views
    2 replies
    Latest 10 months ago
    by TL202504097856
  • Discussion

    SKILL:Does the `lxHimoveAutomatically` function support callback? Locked

    668 views
    1 reply
    Latest 10 months ago
    by Andrew Beckett
  • Suggested Answer

    How can I change all text blocks to 64? 0

    3472 views
    3 replies
    Latest 10 months ago
    by steve
  • Discussion

    How to get psf directory when running from ade assembler? Locked

    2924 views
    1 reply
    Latest 10 months ago
    by hunTer
  • Suggested Answer

    Taking too long to load step files in 3D environment 0

    2773 views
    1 reply
    Latest 10 months ago
    by Elecguy
  • Not Answered

    OrCAD 23.1-S001, Design Rules Check dialog box is displayed incorrectly and the options are not functional 0

    8789 views
    10 replies
    Latest 10 months ago
    by gvellet
  • Answered

    ERROR(SPMHOD-1): Design has been corrupted, saving as 'XXX.SAV'. 0

    2812 views
    3 replies
    Latest 10 months ago
    by MM202504016128
  • Discussion

    how to use schProduceUniqueCVHier in Scheme Locked

    4008 views
    4 replies
    Latest 10 months ago
    by kkdesbois
  • Not Answered

    How to add a custom page size to the Smart PDF printer 0

    9890 views
    2 replies
    Latest 10 months ago
    by printerdriver
  • Discussion

    Encountering Thermal-1501 in Legato Electrothermal Simulation Locked

    2740 views
    2 replies
    Latest 10 months ago
    by AB_1718053087553
  • Discussion

    Facing "Segmentation Fault" error while trying to run Assura DRC for layout analysis. Locked

    1528 views
    5 replies
    Latest 10 months ago
    by AP202504073541
  • Discussion

    Import verilog with VDD, VSS, VNW & VPW Locked

    3594 views
    9 replies
    Latest 10 months ago
    by Volker T
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