• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Forum - Thread List
  • Discussion

    Saving simulation data for later use by running AMS Locked

    18497 views
    7 replies
    Latest over 6 years ago
    by Andrew Beckett
  • Discussion

    highlighting bbox Locked

    17318 views
    5 replies
    Latest over 6 years ago
    by Andrew Beckett
  • Discussion

    Is there anyway to lock the schematic view and make it invisible? Locked

    16372 views
    6 replies
    Latest over 6 years ago
    by Andrew Beckett
  • Discussion

    Schematic lost on Allegro Design Entry CIS [ERROR(ORCAP-1153)] Locked

    3705 views
    1 reply
    Latest over 6 years ago
    by Ummer
  • Discussion

    Setting Cut Class during dbCreateVia Locked

    14761 views
    1 reply
    Latest over 6 years ago
    by Andrew Beckett
  • Discussion

    Strange Triangle Shape in Part Footprint Locked

    14487 views
    1 reply
    Latest over 6 years ago
    by steve
  • Discussion

    What is the design name to give in the Tools-> Rules Checker in the project manager window for running logical rules? Locked

    436 views
    0 replies
    Started over 6 years ago
    by anucheruvx
  • Discussion

    Precise Vth extraction of MOS Locked

    18683 views
    5 replies
    Latest over 6 years ago
    by nicola91it
  • Discussion

    HV MOSFET operating region = 4 Locked

    15113 views
    0 replies
    Started over 6 years ago
    by Uzair Mohammed
  • Discussion

    Reuse of Schematics across different Projects Locked

    14382 views
    0 replies
    Started over 6 years ago
    by akmo25
  • Discussion

    Need a skill code to report text block settings from pcb editor.

    15642 views
    10 replies
    Latest over 6 years ago
    by eDave
  • Discussion

    Need your help on Highlight the error location in report.

    10712 views
    4 replies
    Latest over 6 years ago
    by Jason Hsu
  • Discussion

    how can sure a package have multiple parts in orcad capture ? Locked

    15087 views
    4 replies
    Latest over 6 years ago
    by tennywhy
  • Discussion

    Synthesize net to flip-flop cell with differential output. Locked

    17858 views
    0 replies
    Started over 6 years ago
    by RemyP
  • Discussion

    How can I perform auto format Cadence Skill, such as indent, align...

    7479 views
    7 replies
    Latest over 6 years ago
    by B Bruekers
<>

© 2026 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information