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For most chips, the automatic routing in Innovus—NanoRoute—works well. But there are certain styles of chips that are more challenging for a grid-based router to do clean structured routing.

• Large die size designs with buses that go from...

One of the perks of writing this blog is that I get offered review copies of interesting books related to the semiconductor industry. It is hard to go a day without hearing about IoT security issues (and I write about it regularly, most recently in Video...

Tom Quan recently came to Cadence to talk about TSMC's automotive strategy. Tom and I go back a long way since fifteen years ago, when I was running the custom IC group. I hired him into Cadence to work for me to run a project that had the nickname Superchip...

https://youtu.be/HL0GFG9tNP4

Coming from Cadence security camera

Monday: Embedded Neural Network Seminar Summary

Tuesday: Jeff Bier, When All Devices Can See

Wednesday: Kunle Olukotun, Scaling Machine Learning

Thursday: Chris Rowen, ENN the New...

In this week's Whiteboard Wednesdays video, principal AE Matt Diehl explains how predefined callback functions in the Cadence VIP agents enable error injection, print logging, event triggering, and scoreboarding in UVM testbenches.  A DisplayPort VIP example is shown, which illustrates the quick and easy scoreboarding method.

Yesterday I wrote a post He Who Goes First...Loses about how being first isn't always a good thing. Either in the short term, being first is a negative, or there is a short-term positive but longer term things are not so great.

There is a saying, of course, that he who goes first wins. And sometimes, and in some ways, that is true. But not always, and especially not always in the long run.

The most obvious example of going first being dangerous is the forlorn...

Igor Keller gave an internal presentation on Handling Variability in the Modern Design Cycle last week. He is one of the key architects for the Tempus timing engine. However, since his presentation was mostly about the state of the art in static timing...

https://youtu.be/XOS4sfILahc

Coming from Design Con 2017

Monday: He Who Goes First...Loses

Tuesday: He Who Goes First Loses, EDA Edition

Wednesday: TSMC Automotive Strategy

Thursday: Book on Circuits and Systems for Security and Privacy

Friday...

Congratulations to the IEEE-1647 e Functional Verification Language Working Group (eWG)

In the beginning of 2017, the IEEE-1647 eWG issued for publication IEEE Std 1647™ 2016, IEEE Standard for the Functional Verification Language e. This version of the standard, issued under the chairmanship of Darren Galpin from Infineon, with input from other members from the EDA industry, contains enhancements of the e language…

One of the first posts I wrote here at Breakfast Bytes was Where Does 5 Really Mean 30? about process node naming. One company that is heavily involved with process nodes is ASML, and they have attempted to standardize nomenclature to a "standard node...

At the no-longer-so-recent Jasper User Group JUG last year, the keynote was by Erik Seligman. He is one of three authors, along with Tom Schubert and the very nautically named MV Achutha Kiran Kumar (MV stands for motor vessel and is used in front of...

In this week's Whiteboard Wednesdays, Scott Jacobson wraps up his three-part series on Ethernet by focusing on what Ethernet is like today, and how it has expanded into applications like automotive and industrial control.

https://youtu.be/KdOS1SECj90

There are lots of claims to be the first computer, depending on your definition of "computer". Babbage's difference engine was clearly a computer of sorts, although not electronic. His analytical engine was even programmable. But it was finally completed...

Creating a neat and organized schematic is extremely important, and often requires a great deal of forward planning and effort. Placing, aligning, and distributing objects can be time-consuming, if performed manually. However, improvements to the Cadence Virtuoso Schematic Editor accelerates and simplifies this design entry process. New Align and Distribute options simplify placing the objects in a more systematic manner…

Last night was the annual Kaufman Award dinner to present the award to this year's honoree, who is Andrzej Strojwas. I say "this year" but in fact this was the 2016 Kaufman Award. The dinner is usually held in October or November but this year it slipped...

https://youtu.be/NxgrCMJYRew

Coming from Kaufman Award Dinner

Monday: The Kaufman Award Dinner honors Andrzej Strojwas

Tuesday: Embargoed announcement

Wednesday: Formal Verification Book Review

Thursday: ASML Standard Node

Friday: Handling Variability...

SPIE is the international society for optics and photonics, with the purpose of “advancing an interdisciplinary approach to the science and application of light”. What everyone calls "spie", however, is actually the SPIE Advanced...

In a recent a16z presentation, Frank Chen, a partner at Andreessen-Horowitz, says that everything that moves will eventually go autonomous. To be honest, a lot of that was clear at CES recently, where autonomous cars and drones were ubiquitous. If there...

One of the hottest areas in systems right now is deep learning: neural networks, machine learning, machine vision, convolutional neural networks. There are, obviously, differences between these, depending on the application, but one thing they have...

In this week's Whiteboard Wednesdays video, the second in a three-part series, Scott Jacobson describes the birth and formative years of Ethernet, including the contributions of co-inventor Bob Metcalfe whose vision for information sharing built on earlier efforts including the Aloha Network and the Xerox Networking System.

https://youtu.be/MCO8pieJzbo

Cadence today announced that its next-generation Virtuoso® Analog Design Environment (ADE) product suite has won a Product of the Year award from Electronic Products magazine. This year marks Electronic Products’ 41st annual Product of the Year awards, recognizing the best products in the industry.  Over the last 2 years, we have worked very hard to advance the cause of analog design and electrical verification…

It's that time of year when pundits try and predict major changes that will happen in 2017. I suppose I'm a pundit, so here are my predictions. I'm at least honest enough to go back and see what I said last year and whether any of those predictions...