Community

Blogs
Forums
Resources

Latest Forum Posts

Visit the User Forums »

Latest Blog Posts

Verification: Sign Up For Free Verification Sessions -- Only A Few Days Left

teamspecman

Mark your calendar and sign up for the two upcoming free verification sessions sponsored by Cadence. Space is limited. So, please sign up today!
JULY 21^st
All-Day, Hands-on technical workshop in Irvine, CA
Topic: Advanced Verification Techniques using e/SV Workshop
Learn how to architect an advanced testbench using OVM/UVM that contains generation, coverage and checking and much, much more.....
This workshop will focus on…
- 19 Jul 2010
Verification: Software Development Tool Teardown For The Motorola Droid

jasona

Lately, device teardowns of consumer electronics have become popular. There are many articles and videos showing what's inside a particular device. EE Times even had an article asking if they were useful and who actually benefits from them (...
- 19 Jul 2010
Verification: More Thoughts On How To Choose Between The OVM And The UVM

tomacadence

There has been a lot of on-line discussion since DAC about whether the Universal Verification Methodology (UVM) is ready for prime time. My last three blog posts (1 - 2 - 3) addressed some of the reasons why I strongly believe that the UVM is ready and why you should consider it for your next verification project.
In the middle of my series, Mark Glasser from Mentor posted in his blog that "Eventually there will be a tipping…
- 16 Jul 2010
SoC and IP: AnandTech analyzes Crucial C300 SSD with Marvell controller in “The SSD Diaries.” You must read these conclusions.

archive

Anand Lal Shimpi, the man behind the AnandTech.com Web site, has published an extended review of Crucial’s C300 SSD. Two things that make the Crucial C300 SSD somewhat unique are the use of a Marvell SSD controller chip paired with Crucial’s home-grown firmware. The online article is worthwhile for its extensive charts showing drive performance. You should know that the Crucial C300 drive performs pretty well. AnandTech…
- 14 Jul 2010
Verification: Changing the Status Quo in SoC to System Hand-off

jasona

As part of EDA360 Cadence is learning how to play a more significant role in the SoC-to-System handoff. To date, Cadence has served the SoC market by enabling companies to design and verify faster, bigger, and better SoC devices that get used by thei...
- 13 Jul 2010
SoC and IP: MemCon 2010 looms (July 28). Huge networking opportunity with big list of attendees from movers and shakers in the semiconductor memory industry.

archive

Memcon 2010 is a little more than two weeks away and although we’ve blogged about the terrific keynotes, presentations, and panels that will take place, we haven’t really discussed the immense networking opportunity that’s also part of the event. A huge number of attendees from memory vendors, system vendors, and research firms are attending this year and July 28 at MemCon 2010 may be the only chance you’ll get all year…
- 12 Jul 2010
SoC and IP: Upgrading Old PCs with SSDs: Where’s the Notion of Balance?

archive

Martin Veitch of the UK’s www.CIO.co.uk online magazine recently wrote a blog that echoes one SSD vendor’s push to get SSDs considered as serious upgrades for aging PCs. This SSD vendor is trying to draft behind the top PC upgrade, more RAM, which is commonly known to boost PC performance--up to a point. Veitch quotes the vendor’s vice president for SSD and Flash: "The hard drive is the bottleneck." Yes, well maybe it…
- 9 Jul 2010
SoC and IP: SSDs in embedded control: cold rolling steel in old European factories, Part 2, now with photos

archive

Back in May, the Denali Memory Report covered an industrial application for SSDs involving a European steel mill. The SSD-based control system was designed and implemented by Christian Lequeux of CL Consulting in Belgium. Monsieur Lequeux was kind enough to send some really interesting photos and some additional explanation. He writes that the SSDs were ideal for this application because the control system sits in an…
- 8 Jul 2010
SoC and IP: Flash Memory Summit looms in August: All things Flash

archive

When we weren’t looking, registration for MemCon zoomed past 500 and it’s still climbing. (Register here.) This year MemCon is focusing on DRAM and if you need to know about Flash as well, this is indeed your lucky year. The Flash Memory Summit takes place at the Santa Clara Convention Center in August, from the 17th to the 19th. This event is the only conference in the world focused exclusively on Flash memory and its…
- 8 Jul 2010
SoC and IP: Virident PCIe SSD delivers 320,000 read IOPS with 24-year service life

archive

Add Virident to the growing list of companies that have introduced SSDs in the form of PCIe expansion cards to achieve higher storage throughput. The company’s just-introduced tachIOn Drive delivers 200,000 4-kbyte read/write IOPS for 75/25% read/write workloads. The SSD board incorporates a fan-cooled Flash controller and eight Flash modules to create a 200-Gbyte SSD. The Flash modules can be stacked and the board accommodates…
- 7 Jul 2010
Verification: Why The UVM Is Ready For Production Use Today -- Part 3

tomacadence

This is the final installment of my blog posts based on the three common questions I heard at DAC regarding the Universal Verification Methodology (UVM). I've already answered the questions "What does the UVM mean for the future of the OVM and VMM?" and "Why is the first release of the UVM labelled as "Early Adopter (EA)?"
The third and final question that I'd like to address is "Will there…
- 7 Jul 2010
Verification: Duolog Interview At DAC 2010, And The IP Integration Aspect Of EDA360

jvh3

One virtue of events like DAC is that is provides an open forum for vendors to show how they crystallize high-level, abstract ideas to concrete, valuable products. Cadence Connections program partner Duolog made the most of this opportunity by exhibiting their "Socrates" chip integration platform for addressing the growing problem of integrating IP of all shapes, sizes, and domains -- plus maintaining all the…
- 7 Jul 2010
SoC and IP: Specialty semiconductor foundry TowerJazz licenses “Y-Flash” IP to “leading” digital foundry

archive

TowerJazz, the specialty semiconductor foundry created by the merger of Tower Semiconductor and Jazz Semiconductor in 2008, has announced that it has licensed its “Y-Flash” MTP (multiple-times programmable) CMOS memory IP to an unnamed, “leading” digital foundry. TowerJazz’s Y-Flash IP creates a Flash memory cell with standard CMOS processing. In other words, the Y-Flash memory cell has only one gate and it’s a floating…
- 6 Jul 2010
System, PCB, & Package Design : What's Good About Via DRCs In Allegro Constraint Manager? It's In SPB16.3!

Jerry GenPart

Current design technologies require extremely tight matching requirements right down to the overall net topologies to ensure that any deviations in propagation delays are minimized. As a result, design guidelines call for matching the number of vias for a group of signals. The prior releases of Constraint Manager support a "MAX_VIA_COUNT" constraint which does not meet the needs of these new design requirements. The SPB16…
- 2 Jul 2010
SoC and IP: Will Taiwan Innovation Memory Company (TIMC) become Taiwan’s NAND Flash Inc?

archive

The Taiwan Innovation Memory Company (TIMC) was originally formed as the Taiwan Memory Company (TMC) and was tasked with shoring up Taiwan’s DRAM vendors (Powerchip, ProMOS and Rexchip) and linking up with Japanese DRAM powerhouse Elpida acting as a technology partner in an attempt to put Taiwan solidly into the competitive DRAM arena. It didn’t happen. The Taiwan legislature didn’t pony up the cash to get the organization…
- 1 Jul 2010
Verification: Why The UVM Is Ready For Production Use Today - Part 2

tomacadence

In my last blog post, I talked about the three most common questions I heard at DAC from people who had some concerns about moving to the Universal Verification Methodology (UVM). I already addessed the question "What does the UVM mean for the future of the OVM and VMM?" by noting that the OVM developers are moving their focus to the UVM.
Today I'd like to address the second common question: "Why is the first…
- 1 Jul 2010
SoC and IP: DRAM vendors look to 40nm process technology to keep DRAM profits flowing next year

archive

Taiwan Economic News reports that DRAM vendors will be bringing 4x nm process technologies on line during 2010 and 2011 to keep manufacturing profits up. According to P L Pai, vice president of Nanya Technology, DRAM chip makers are presently climbing the learning curve with 40nm process technologies and he says that the lead time of 40nm immersion tools averages nine months. Consequently, he predicts that production…
- 30 Jun 2010
Verification: DAC Report: Interview With AMIQ And Update On Their “DVT” IDE

jvh3

One of the benefits of the Design Automation Conference is the opportunity to follow the growth trajectory of partner companies with each successive show. Last year our long time Verification Alliance partner AMIQ (a name familiar to many Specmaniacs) made their first appearance at DAC, and they were back in force this year with new employees and new capabilities.
In this video I interview AMIQ's CEO Cristian Amitroaie…
- 30 Jun 2010
Verification: DAC report: Video Interview With Zocalo

TeamVerify

One of the benefits of the annual Design Automation Conference is the opportunity for innovative start-ups to make their mark. This year, our partner Zocalo made several "must see lists" for their Zazz platform's ability to make life easier for IP creators and integrators with their easy to use Assertion Based Verification (ABV) tool suite.
In this brief video, Zocalo's CTO Khalil Shalish covers the highlights…
- 29 Jun 2010
Verification: Why The UVM Is Ready For Production Use Today - Part 1

tomacadence

As I mentioned in my DAC report, I spent the largest percentage of my time at the OVM-UVM booth, educating attendees on the status of the Universal Verification Methodology (UVM) and answering their questions. Many people had heard about the UVM, although some were unclear on its relation to the Open Verification Methodology (OVM). I was happy to emphasize the tight link between them.
In fact, the booth showed the two…
- 29 Jun 2010
Digital Design: DAC 2010 – A “Coming Out” Party For 3D-IC Design

RahulD

Overall, the 2010 Anaheim DAC was livelier than the years before. Customer and vendor faces were not long and serious, but more purposeful and forward-looking. The recent M&A activity also brought in some rays of sunshine. The EDA360 vision for the entire industry resonated with a wide gamut of system companies, IDM's, ASIC/IP vendors and foundries. And, the hottest topic this year definitely was 3D-IC (Stacked…
- 28 Jun 2010
SoC and IP: New Freescale ARM-M4 and ColdFire-based 32-bit microcontrollers feature on-chip nanocrystal non-volatile memories

archive

June’s Microprocessor Report carries an article written by Editor-in-Chief Jim Turley that describes two new 32-bit microcontroller families from Freescale (formerly Motorola Semiconductor)--one family dubbed Kinetis featuring an ARM Cortex-M4 processor core and the other a revamped ColdFire processor architecture dubbed ColdFire+. Both microcontroller families feature a non-volatile, “Flash-like” memory technology dubbed…
- 28 Jun 2010
SoC and IP: Intel + Best Buy + SSD = Sign of the Times

archive

Intel recently announced that Best Buy is now carrying its retail-boxed X25-M (mainstream) and X25-V (value) SSDs. The 80-Gbyte X25-M sells for $229.99 and the 40-Gbyte X25-V sells for $129.99. Neither of these drives is large enough to act as a replacement drive in most of today’s notebook or even netbook computers. However, they can serve as boot and application drives to help speed boot and load times. Nevertheless…
- 28 Jun 2010
Verification: Tech Tip On Verification Environment Re-Use

Team MDV

Verification has come a long way this past year, the highlight of which is UVM. UVM gives us verification productivity with testbench re-use because of a well defined SystemVerilog coding structure. But beyond UVM, what are the areas that are the most challenging and thus time consuming? We recently asked some of our users this question, and got some interesting answers, which are reflected in the chart below.

The interesting…
- 27 Jun 2010
Verification: DAC Perspective One Week Later

tomacadence

DAC in Anaheim last week was as busy as always, perhaps more so, and of course I arrived back in San Jose to a mountain of work set aside during the show and the run-up to it. But I have dug myself out enough to look back at DAC and make a few observations. First of all, I know that overall attendance was down but I was as busy as I've ever been there. Cadence was back at DAC in a big way, and there was a lot of activity…
- 25 Jun 2010

Cadence Guidelines

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.