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Forum - Thread List
  • Not Answered

    ERROR(ORCIS-6277) 0

    1805 views
    1 reply
    Latest over 3 years ago
    by Schulz Jordan
  • Discussion

    Import third-party designs to OrCAD Capture

    13854 views
    7 replies
    Latest over 3 years ago
    by Schulz Jordan
  • Not Answered

    How to format outfile with ansi font by skill 0

    4689 views
    3 replies
    Latest over 3 years ago
    by Noradavis
  • Not Answered

    Downloadable PCB - Title block acc. ISO 7002 (metric)? 0

    5016 views
    9 replies
    Latest over 3 years ago
    by Abigail J
  • Not Answered

    Netlist Error: duplicate reference found but cant find a part with this ref 0

    10595 views
    2 replies
    Latest over 3 years ago
    by domkap
  • Not Answered

    Why are items not importing in the correct position from dxf to cadence 0

    8820 views
    2 replies
    Latest over 3 years ago
    by steve
  • Answered

    Total Etch Length Matching 0

    13567 views
    6 replies
    Latest over 3 years ago
    by steve
  • Discussion

    calcVal function referring a curve Locked

    9531 views
    3 replies
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    Allegro - Tip of the week: Creating a Command Shortcut with Scriptmode +e

    4203 views
    2 replies
    Latest over 3 years ago
    by Schulz Jordan
  • Discussion

    How to get all blocking layers touching a Pcell from inside Pcell code Locked

    8258 views
    1 reply
    Latest over 3 years ago
    by Andrew Beckett
  • Discussion

    json to SKILL Locked

    10530 views
    2 replies
    Latest over 3 years ago
    by AurelBuche
  • Discussion

    I don't see the Allegro PCB Design CIS L suite when opening Orcad Capture

    7565 views
    11 replies
    Latest over 3 years ago
    by Schulz Jordan
  • Discussion

    How to create a GUI with editable table Locked

    9746 views
    1 reply
    Latest over 3 years ago
    by Andrew Beckett
  • Not Answered

    Concept HDL: Top to Bottom hierarchical approach and Rooms 0

    7504 views
    1 reply
    Latest over 3 years ago
    by Schulz Jordan
  • Discussion

    Override a VerilogA parameters module while in tran Analysis. Locked

    8092 views
    0 replies
    Started over 3 years ago
    by Omar Ghazal
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