Custom IC Design

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Discussion

Exporting manufactured interconnect geometry including DFM effects

Category: Custom IC Design

By ArnoSetagaya

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updated over 12 years ago by Quek

1 replies • 14371 views
Discussion

Terminal Mismatch for MOS_a2d in virtuoso

Category: Custom IC Design

By Arslan

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updated over 12 years ago by Andrew Beckett

2 replies • 14534 views
Discussion

model name for normal diode in virtuoso shematic editor

Category: Custom IC Design

By madhusudha

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updated over 12 years ago by diode model

6 replies • 24611 views
Discussion

Which noise does param 'sh' stand for in ADE noise summary?

Category: Custom IC Design

By Raveesh

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updated over 12 years ago by Andrew Beckett

3 replies • 14523 views
Discussion

IC5141 - LEFOut failed.

Category: Custom IC Design

By kb how

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updated over 12 years ago by kb how

6 replies • 2894 views
Discussion

Another unique veriloga filename question

Category: Custom IC Design

By ricez

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updated over 12 years ago by ricez

2 replies • 15043 views
Discussion

Flightlines in Layout XL

Category: Custom IC Design

By pham777

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updated over 12 years ago by pham777

2 replies • 17428 views
Discussion

How to ignore some minor dots in streaming out the gds file

Category: Custom IC Design

By SUEE

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updated over 12 years ago by Andrew Beckett

8 replies • 16581 views
Discussion

Schematic view settings in cdsenv

Category: Custom IC Design

By Abhilash B

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updated over 12 years ago by theopaone

3 replies • 16909 views
Discussion

Trigger warning on sessioin start

Category: Custom IC Design

By wgtkan

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updated over 12 years ago by Andrew Beckett

4 replies • 16277 views
Discussion

Creating an automatic via

Category: Custom IC Design

By Siddique baig

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updated over 12 years ago by Andrew Beckett

1 replies • 17062 views
Discussion

Log directory gets created (taking up space)

Category: Custom IC Design

By wgtkan

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updated over 12 years ago by Andrew Beckett

1 replies • 13857 views
Discussion

How to change wire's collor in Virtuso Schematic Editor

Category: Custom IC Design

By Runner

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updated over 12 years ago by Andrew Beckett

2 replies • 3549 views
Discussion

Generate legenend on a plot

Category: Custom IC Design

By wgtkan

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updated over 12 years ago by Andrew Beckett

19 replies • 26198 views
Discussion

How to import spice models libraries (*.lib and *.olb) in cadence/virtuoso/spectre ?

Category: Custom IC Design

By lraf

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updated over 13 years ago by HamidKhatibi

8 replies • 14810 views

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