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Custom IC Design

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  • Discussion

    how to netlist parameter value for different simulator

    Category: Custom IC Design

    By Fabb

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    updated over 12 years ago by Andrew Beckett

    1 replies • 14018 views
  • Discussion

    QRC: extract only down to a certain layout level

    Category: Custom IC Design

    By MarkusK

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    updated over 12 years ago by MarkusK

    2 replies • 16080 views
  • Discussion

    Installing IC615

    Category: Custom IC Design

    By Thorin

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    updated over 12 years ago by Andrew Beckett

    5 replies • 17134 views
  • Discussion

    Re: Help for SUB 1Volt BGR(band gap reference)cadence simulation error

    Category: Custom IC Design

    By koundinya

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    updated over 12 years ago by Andrew Beckett

    1 replies • 826 views
  • Discussion

    Transistors in series

    Category: Custom IC Design

    By Glir

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    updated over 12 years ago by Andrew Beckett

    7 replies • 20085 views
  • Discussion

    Schematic Editor: Make cell EDITABLE automatically

    Category: Custom IC Design

    By NiallDuncan

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    updated over 12 years ago by NiallDuncan

    2 replies • 17525 views
  • Discussion

    VerilogA: report DC voltage

    Category: Custom IC Design

    By Frank Opteynde

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    updated over 12 years ago by Andrew Beckett

    1 replies • 15010 views
  • Discussion

    Error in Calc: expression evaluation failed

    Category: Custom IC Design

    By Vi Muthukumar

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    updated over 12 years ago by Vi Muthukumar

    11 replies • 28584 views
  • Discussion

    ocean XL

    Category: Custom IC Design

    By analogdesign

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    updated over 12 years ago by analogdesign

    14 replies • 18614 views
  • Discussion

    ASSURA 4.1 Supported Platform?

    Category: Custom IC Design

    By emax00

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    updated over 12 years ago by Andrew Beckett

    1 replies • 14099 views
  • Discussion

    Interactive verilogA models in Spectre

    Category: Custom IC Design

    By Sali

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    updated over 12 years ago by Sali

    2 replies • 14185 views
  • Discussion

    How to create a final netlist from ADE-XL with global variables using Skill?

    Category: Custom IC Design

    By adeuser777

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    updated over 12 years ago by sram8t

    7 replies • 18585 views
  • Discussion

    How to Queue for a Virtuoso Schematic Editor License

    Category: Custom IC Design

    By nbyrne

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    updated over 12 years ago by Andrew Beckett

    4 replies • 15807 views
  • Discussion

    Installing and setting up PVS10.1.2 on IC6.15

    Category: Custom IC Design

    By Alex Vasjanov

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    updated over 12 years ago by Andrew Beckett

    1 replies • 15634 views
  • Discussion

    waveform processing question in Virtuoso ViVA

    Category: Custom IC Design

    By apple419

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    updated over 12 years ago by Tawna

    4 replies • 16485 views
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