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Custom IC Design

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  • Discussion

    The resolution of sin wave

    Category: Custom IC Design

    By Medya

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    updated over 13 years ago by Andrew Beckett

    10 replies • 21261 views
  • Discussion

    Converttime

    Category: Custom IC Design

    By Sword1983

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    updated over 13 years ago by Andrew Beckett

    1 replies • 13586 views
  • Discussion

    How to define double vias in rules file for VCAR

    Category: Custom IC Design

    By PSRK

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    updated over 13 years ago by Andrew Beckett

    12 replies • 21352 views
  • Discussion

    Difference between n/p –select and n/p - active layers in CMOS layout techniques.

    Category: Custom IC Design

    By RAO VINAY

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    updated over 13 years ago by Andrew Beckett

    1 replies • 3248 views
  • Discussion

    IC5141 on RHEL5 64bit

    Category: Custom IC Design

    By pyohayo

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    •

    updated over 13 years ago by pyohayo

    6 replies • 18135 views
  • Discussion

    stubborn VXL markers

    Category: Custom IC Design

    By linbo

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    •

    updated over 13 years ago by Quek

    4 replies • 15060 views
  • Discussion

    Questions about OCEAN XL

    Category: Custom IC Design

    By jorankin

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    •

    updated over 13 years ago by stsui

    5 replies • 17264 views
  • Discussion

    ASSURA LVS error | Custom Inductor | Pin mismatch | Unbound devices

    Category: Custom IC Design

    By pitter

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    •

    updated over 13 years ago by snaildr

    8 replies • 19825 views
  • Discussion

    VCAR V11.2.41.500.6.68 hanging-up on command "route 10"

    Category: Custom IC Design

    By lawlag02

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    updated over 13 years ago by Quek

    3 replies • 1254 views
  • Discussion

    Assura Rules file debuging

    Category: Custom IC Design

    By jmoore

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    •

    updated over 13 years ago by genieQ

    3 replies • 15696 views
  • Discussion

    IC package choice

    Category: Custom IC Design

    By pyohayo

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    •

    updated over 13 years ago by pyohayo

    11 replies • 18474 views
  • Discussion

    Wrong AC simulation results with MMSIM10 (IC6.14)

    Category: Custom IC Design

    By Kabal

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    updated over 13 years ago by Quek

    1 replies • 13916 views
  • Discussion

    verilog auto-checker search paths

    Category: Custom IC Design

    By markbeck

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    •

    updated over 13 years ago by chrger

    3 replies • 15819 views
  • Discussion

    Is there a way to make Cadence point to the error?

    Category: Custom IC Design

    By tony4tony

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    •

    updated over 13 years ago by linbo

    7 replies • 19985 views
  • Discussion

    MC string read out

    Category: Custom IC Design

    By Josef

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    •

    started over 13 years ago

    0 replies • 13701 views
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