Custom IC Design

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Discussion

Virtuoso XL LE: Extract connectivity through "empty" areas

Category: Custom IC Design

By RVERP

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updated over 7 years ago by Andrew Beckett

1 replies • 1443 views
Discussion

Including dspf file in Spectre and back-annotation of transistor's parameters and fingers

Category: Custom IC Design

By Ron M

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updated over 7 years ago by Andrew Beckett

3 replies • 9157 views
Discussion

Require Help regarding adding custom layer/extraction in GPDK45nm

Category: Custom IC Design

By Ryan18IITDelhi

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updated over 7 years ago by Quek

1 replies • 821 views
Discussion

RC Extraction Problem with GPDK045

Category: Custom IC Design

By NickAM

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updated over 7 years ago by NickAM

2 replies • 14619 views
Discussion

Are inherited connections supported by layout XL

Category: Custom IC Design

By RVERP

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updated over 7 years ago by RVERP

4 replies • 15131 views
Discussion

Menu Assura only in windows Layout not present in the window Schematic

Category: Custom IC Design

By AndreyVolk

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updated over 7 years ago by AndreyVolk

2 replies • 5940 views
Discussion

Display problem when I zoom in multiple waveforms

Category: Custom IC Design

By christon

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updated over 7 years ago by christon

6 replies • 16649 views
Discussion

How to Save Optimized Design Variables to a new Corner for Later Simulation

Category: Custom IC Design

By jp2o

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updated over 7 years ago by jp2o

9 replies • 17910 views
Discussion

How do you right justify multi-line labels?

Category: Custom IC Design

By CADcasualty

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updated over 7 years ago by Andrew Beckett

2 replies • 15498 views
Discussion

Parameter passing hygiene

Category: Custom IC Design

By CADcasualty

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updated over 7 years ago by Andrew Beckett

10 replies • 16237 views
Discussion

A file needs to know it's place in the world

Category: Custom IC Design

By CADcasualty

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updated over 7 years ago by CADcasualty

2 replies • 660 views
Discussion

ADE-XL: Save statistical scatter plot setup

Category: Custom IC Design

By drdanmc

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updated over 7 years ago by Andrew Beckett

3 replies • 15114 views
Discussion

How to import verilog code into virtuoso?

Category: Custom IC Design

By raveensrk

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updated over 7 years ago by raveensrk

2 replies • 25706 views
Discussion

VAR syntax in Digital Vector File

Category: Custom IC Design

By sonofthesand

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updated over 7 years ago by sonofthesand

2 replies • 15327 views
Discussion

Liberate fails due to wrongly generated command

Category: Custom IC Design

By marten

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updated over 7 years ago by Andrew Beckett

10 replies • 18258 views

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