Custom IC Design

Latest Posts

Discussion

is there any possibility a nmos vth<vth0?

Category: Custom IC Design

By LiJin

$usertype
•
updated over 14 years ago by LiJin

2 replies • 1283 views
Discussion

Help me to interpret the waveform window.

Category: Custom IC Design

By Muffassir

$usertype
•
updated over 14 years ago by Andrew Beckett

4 replies • 14600 views
Discussion

how to add a param to a symbol? a macro symbol.

Category: Custom IC Design

By LiJin

$usertype
•
updated over 14 years ago by LiJin

3 replies • 14003 views
Discussion

Creating circle in Virtuoso

Category: Custom IC Design

By zhengli

$usertype
•
updated over 14 years ago by ejm20

8 replies • 21137 views
Discussion

Want o simulate the four quad current multiplier.

Category: Custom IC Design

By Muffassir

$usertype
•
updated over 14 years ago by Andrew Beckett

1 replies • 14819 views
Discussion

Table generated in the calculator

Category: Custom IC Design

By Cooktime

$usertype
•
updated over 14 years ago by Cooktime

3 replies • 15943 views
Discussion

Analog stimuli in ADEXL error

Category: Custom IC Design

By rkic

$usertype
•
updated over 14 years ago by rkic

4 replies • 15918 views
Discussion

cadence IC 6.14 license issue

Category: Custom IC Design

By FedericoPI

$usertype
•
updated over 14 years ago by Andrew Beckett

7 replies • 23828 views
Discussion

different current through two series resistors

Category: Custom IC Design

By Rezaee

$usertype
•
updated over 14 years ago by Andrew Beckett

6 replies • 16675 views
Discussion

Behavioural source expressions in ADE-XL IC614

Category: Custom IC Design

By TjaartOpperman

$usertype
•
started over 14 years ago

0 replies • 13297 views
Discussion

dcmatch results

Category: Custom IC Design

By mate0409

$usertype
•
started over 14 years ago

0 replies • 14530 views
Discussion

Disable/reset modifiedCounter in IC61

Category: Custom IC Design

By Eduard Raines

$usertype
•
updated over 14 years ago by Eduard Raines

2 replies • 891 views
Discussion

Schematic & Layout XL issue

Category: Custom IC Design

By jimito13

$usertype
•
updated over 14 years ago by jimito13

4 replies • 1743 views
Discussion

cross probing from schematic to layout in 6.1.5

Category: Custom IC Design

By James Beaufore

$usertype
•
updated over 14 years ago by Eduard Raines

1 replies • 14332 views
Discussion

CADENCE: SKILL function for get the marker from RVE into a layout cellview

Category: Custom IC Design

By simonec

$usertype
•
updated over 14 years ago by simonec

2 replies • 15012 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.