Custom IC Design

Latest Posts

Discussion

ADEXL -1612 error simulator not in path

Category: Custom IC Design

By Ouda

$usertype
•
updated over 5 years ago by Andre Mansano

4 replies • 10835 views
Discussion

Too many Point Sweeps (>1 M) for ADE XL to handle

Category: Custom IC Design

By FormerMember

$usertype
•
updated over 5 years ago by FormerMember

5 replies • 2996 views
Discussion

data.dm in cell, which view type is depend on it?

Category: Custom IC Design

By YangKe

$usertype
•
started over 5 years ago

0 replies • 13851 views
Discussion

cds_ff_mpt PDK?

Category: Custom IC Design

By rsashwinkumar

$usertype
•
updated over 5 years ago by Danielrayray

7 replies • 19296 views
Discussion

Regarding Monte-Carlo Simulations

Category: Custom IC Design

By Kabes

$usertype
•
updated over 5 years ago by Kabes

4 replies • 17175 views
Discussion

Assura and Quantus options

Category: Custom IC Design

By sidm

$usertype
•
updated over 5 years ago by sidm

6 replies • 17166 views
Discussion

Computing logarithm in simulator

Category: Custom IC Design

By smikes

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 15337 views
Discussion

probe tcl command with time_window option

Category: Custom IC Design

By apogee

$usertype
•
updated over 5 years ago by apogee

2 replies • 17805 views
Discussion

DC SWEEP COMPONENT VARIABLE

Category: Custom IC Design

By joaopaulo

$usertype
•
updated over 5 years ago by joaopaulo

2 replies • 15091 views
Discussion

Is there a setting to let multiple runs of transient noise run in parallel

Category: Custom IC Design

By ExcaIibur

$usertype
•
updated over 5 years ago by ExcaIibur

2 replies • 17054 views
Discussion

skill command to get the current library name

Category: Custom IC Design

By Meny Lea

$usertype
•
updated over 5 years ago by Andrew Beckett

5 replies • 18010 views
Discussion

rfTlineLib sbend

Category: Custom IC Design

By dzakharian

$usertype
•
updated over 5 years ago by Andrew Beckett

1 replies • 13581 views
Discussion

Output expressions containing variables and parameters not executed when using ADE XL

Category: Custom IC Design

By Chevelle70

$usertype
•
updated over 5 years ago by Andrew Beckett

6 replies • 23003 views
Discussion

Mark Net in Virtuoso-L

Category: Custom IC Design

By threepwood06

$usertype
•
updated over 5 years ago by threepwood06

11 replies • 23892 views
Discussion

VMT

Category: Custom IC Design

By sidm

$usertype
•
updated over 5 years ago by Andrew Beckett

5 replies • 14666 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.