Custom IC Design

Latest Posts

Discussion

VIVA: Change color/disable highlighting around current (sub-)window

Category: Custom IC Design

By dontpanic
•
updated 1 month ago by dontpanic

6 replies • 523 views
Discussion

Problems with genvar and nested for loops in verilog-A after updating the Cadence tools

Category: Custom IC Design

By Esmee Tackx
•
started 1 month ago

0 replies • 470 views
Discussion

Latency to Connect License server

Category: Custom IC Design

By Tarique mohd
•
updated 1 month ago by Saloni Chhabra

3 replies • 695 views
Discussion

Parasitic Extraction Failure in Quantus - Assura

Category: Custom IC Design

By MK202507103018
•
started 1 month ago

0 replies • 158 views
Discussion

Netlisting 'config' view with SPICE source file... CDF parameter m= on symbol is not printed in netlist instance call

Category: Custom IC Design

By JeffBeck
•
updated 1 month ago by JeffBeck

2 replies • 471 views
Discussion

pxf or pac sampled Explanation

Category: Custom IC Design

By Patrick Chang
•
started 1 month ago

0 replies • 559 views
Discussion

calcVal function works during the simulation, but fails after initiating re-evaluation

Category: Custom IC Design

By A1vis
•
updated 1 month ago by A1vis

8 replies • 1585 views
Discussion

PSS/Pnoise analysis for divider circuit, input is pulse waveform from vsource with noise profile

Category: Custom IC Design

By Zaara
•
started 1 month ago

0 replies • 235 views
Discussion

Tolerance relaxation when calculating DC operating point - impact on accuracy of SP analysis

Category: Custom IC Design

By Macio
•
updated 1 month ago by Macio

2 replies • 440 views
Discussion

Nested ddt Operator

Category: Custom IC Design

By JF202408126026
•
updated 1 month ago by JF202408126026

2 replies • 557 views
Discussion

using bus pin for inherited connection with AMS

Category: Custom IC Design

By Darrell L
•
started 1 month ago

0 replies • 508 views
Discussion

Parasitic Extraction (PEX) - Tool Migration from IC6 to IC23

Category: Custom IC Design

By ranaya
•
updated 1 month ago by Andrew Beckett

1 replies • 289 views
Discussion

How to apply the instance name used in the schematic to the same mosfet in layout?

Category: Custom IC Design

By MB202506119828
•
updated 1 month ago by MB202506119828

10 replies • 1585 views
Discussion

IC problem in simulation

Category: Custom IC Design

By RA202502215244
•
updated 1 month ago by Andrew Beckett

3 replies • 1200 views
Discussion

How can i make auto y-axis range work for each result in Corner simulation?

Category: Custom IC Design

By ichiro
•
updated 1 month ago by Andrew Beckett

1 replies • 922 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.