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Custom IC Design

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  • Discussion

    Issue with Spectre Simulation in ADE Explorer (Virtuoso IC23.1-64b.ISR11.29)

    Category: Custom IC Design

    By BR202502181318 BR202502181318

    •

    updated 6 months ago by Alonso Schmidt

    3 replies • 2266 views
  • Discussion

    Enhancing Layer Visibility Control with Middle Mouse Button Click

    Category: Custom IC Design

    By HarishGottapu HarishGottapu

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1458 views
  • Discussion

    transient noise

    Category: Custom IC Design

    By Nalaeg Nalaeg

    •

    updated 6 months ago by Andrew Beckett

    2 replies • 1748 views
  • Discussion

    how to create a via in pcell?

    Category: Custom IC Design

    By TZ20240722725 TZ20240722725

    •

    started 6 months ago

    0 replies • 1418 views
  • Discussion

    Passing Global Variable to Matlab function

    Category: Custom IC Design

    By eyalg eyalg

    •

    started 6 months ago

    0 replies • 1390 views
  • Discussion

    Inductor in Cadence Virtuoso

    Category: Custom IC Design

    By Nalaeg Nalaeg

    •

    updated 6 months ago by Nalaeg

    3 replies • 2570 views
  • Discussion

    Where to Find the Script That Defines Default Corner Settings in a New Maestro View?

    Category: Custom IC Design

    By baltaci baltaci

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1668 views
  • Discussion

    SPICEIN for importing netlisting with pPar expressions

    Category: Custom IC Design

    By PSKR PSKR

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1810 views
  • Discussion

    Metric Prefix

    Category: Custom IC Design

    By samirc samirc

    •

    updated 6 months ago by Andrew Beckett

    1 replies • 1635 views
  • Discussion

    Open Design in Assembler Test can cause overwriting of the design

    Category: Custom IC Design

    By StephanWeber StephanWeber

    •

    updated 6 months ago by StephanWeber

    4 replies • 1798 views
  • Discussion

    veriloga error between spectre and ams

    Category: Custom IC Design

    By SimhanAnalog SimhanAnalog

    •

    updated 6 months ago by SimhanAnalog

    4 replies • 2155 views
  • Discussion

    sampled PAC transfer function to discrete step response

    Category: Custom IC Design

    By david73 david73

    •

    started 6 months ago

    0 replies • 1475 views
  • Discussion

    Stability Analysis of a Ramp Generator Circuit in Integration Phase

    Category: Custom IC Design

    By baltaci baltaci

    •

    updated 6 months ago by StephanWeber

    4 replies • 2343 views
  • Discussion

    PAM4 eye diagrams in Cadence

    Category: Custom IC Design

    By TUKA TUKA

    •

    updated 6 months ago by TUKA

    2 replies • 2106 views
  • Discussion

    Schematic pin highlight

    Category: Custom IC Design

    By SimhanAnalog SimhanAnalog

    •

    updated 6 months ago by Andrew Beckett

    2 replies • 2370 views
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