Custom IC Design

Latest Posts

Discussion

how to avoid recompiling ahdlcmi?

Category: Custom IC Design

By freitas

$usertype
•
updated over 13 years ago by Andrew Beckett

2 replies • 15183 views
Discussion

question about cadence virtuoso

Category: Custom IC Design

By titanic

$usertype
•
updated over 13 years ago by Andrew Beckett

3 replies • 14984 views
Discussion

error in assura rcx (parasitic extraction)

Category: Custom IC Design

By kpkp

$usertype
•
updated over 13 years ago by Quek

1 replies • 14114 views
Discussion

Nodeset for subcircuit

Category: Custom IC Design

By titanic

$usertype
•
updated over 13 years ago by Andrew Beckett

2 replies • 16668 views
Discussion

Assura LVS - number of edges of first layer butting/coincident with the second layer

Category: Custom IC Design

By windowsdee

$usertype
•
updated over 13 years ago by Quek

1 replies • 871 views
Discussion

analog-mixed signal simulation with verilog-a vhdl and circuit components

Category: Custom IC Design

By Zitty

$usertype
•
updated over 13 years ago by Zitty

4 replies • 16442 views
Discussion

mmsim61

Category: Custom IC Design

By wighou

$usertype
•
updated over 13 years ago by Andrew Beckett

1 replies • 13555 views
Discussion

How to Find content of Bonding Box.

Category: Custom IC Design

By ShrikantTI

$usertype
•
updated over 13 years ago by ShrikantTI

2 replies • 14082 views
Discussion

How to simulate full custom digital circuit digitally in virtuoso(spectre)

Category: Custom IC Design

By wenxuzhao

$usertype
•
updated over 13 years ago by Andrew Beckett

6 replies • 5691 views
Discussion

Parallel Monte Carlo runs using AMS?

Category: Custom IC Design

By aakhavan

$usertype
•
updated over 13 years ago by Andrew Beckett

1 replies • 14372 views
Discussion

Error during ASSURA parasitic extraction.

Category: Custom IC Design

By RAO VINAY

$usertype
•
updated over 13 years ago by Quek

1 replies • 14118 views
Discussion

skill to detect ADEXL options

Category: Custom IC Design

By ejm20

$usertype
•
updated over 13 years ago by Michael85

38 replies • 29773 views
Discussion

"cannot be found in the switched master of the instance" error during netlist

Category: Custom IC Design

By yayla

$usertype
•
updated over 13 years ago by yayla

2 replies • 6949 views
Discussion

Drawing with Viva

Category: Custom IC Design

By BradW

$usertype
•
updated over 13 years ago by Andrew Beckett

1 replies • 15531 views
Discussion

IC6.14, Issues with Hierarchy in schematics

Category: Custom IC Design

By Kabal

$usertype
•
updated over 13 years ago by Kabal

2 replies • 15599 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.