Custom IC Design

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Discussion

Scaling Factors

Category: Custom IC Design

By BaaB

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started over 10 years ago

0 replies • 15788 views
Discussion

Virtuoso ADE L calculator - delay function - Variable value in threshold field

Category: Custom IC Design

By Manp

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updated over 10 years ago by Manp

2 replies • 4507 views
Discussion

Easy way to connect a input bus pins in schematic

Category: Custom IC Design

By Johanny Saenz

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updated over 10 years ago by Andrew Beckett

2 replies • 19117 views
Discussion

Source file for ELDO simulation

Category: Custom IC Design

By UUinfini

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updated over 10 years ago by Andrew Beckett

1 replies • 15097 views
Discussion

Transient simulation accuracy

Category: Custom IC Design

By ymn2009

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updated over 10 years ago by Andrew Beckett

3 replies • 17939 views
Discussion

Verilog -A amp

Category: Custom IC Design

By black tea

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updated over 10 years ago by Andrew Beckett

5 replies • 10477 views
Discussion

Problem seeing the layout content of the instances

Category: Custom IC Design

By Neo2012

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updated over 10 years ago by Andrew Beckett

3 replies • 14919 views
Discussion

capgen error

Category: Custom IC Design

By Jaganath

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updated over 10 years ago by Andrew Beckett

1 replies • 14209 views
Discussion

If-else statement in VerilogA- Designing a memory element

Category: Custom IC Design

By Nishtha Sharma

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updated over 10 years ago by Nishtha Sharma

3 replies • 2902 views
Discussion

EMIR Units

Category: Custom IC Design

By rafaelon

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updated over 10 years ago by Tom Volden

5 replies • 16306 views
Discussion

Static current calculation using Ocean script

Category: Custom IC Design

By saikatc

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updated over 10 years ago by saikatc

1 replies • 14081 views
Discussion

Trouble with ocean script for parametric analysis using ADE L

Category: Custom IC Design

By saikatc

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updated over 10 years ago by saikatc

11 replies • 19164 views
Discussion

Script Skill: copy layers in the layout view

Category: Custom IC Design

By tahm

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updated over 10 years ago by Andrew Beckett

3 replies • 16898 views
Discussion

How could I make my PV GUI communicate with Virtuoso through port so gds export has no issue

Category: Custom IC Design

By mctang

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updated over 10 years ago by mctang

4 replies • 15861 views
Discussion

Aging simulation fails in mode URI_mode: appendage

Category: Custom IC Design

By Amel

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updated over 10 years ago by Andrew Beckett

1 replies • 14581 views

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