Custom IC Design

Latest Posts

Discussion

A question about displaying opPoints information ...?

Category: Custom IC Design

By Prabhu The ICL
•
updated over 14 years ago by Quek

1 replies • 13149 views
Discussion

Mark Net and vias

Category: Custom IC Design

By Adrian Nistor
•
started over 14 years ago

0 replies • 13056 views
Discussion

Diva extraction warnings on large layout

Category: Custom IC Design

By Zach
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updated over 14 years ago by Andrew Beckett

1 replies • 12793 views
Discussion

Jitter in Strong and Weak Inversions

Category: Custom IC Design

By pcardoso73
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updated over 14 years ago by pcardoso73

1 replies • 13031 views
Discussion

Regular expressions in a schematic search

Category: Custom IC Design

By J Wilwert
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updated over 14 years ago by J Wilwert

2 replies • 13201 views
Discussion

Problem in importing CDL/Spice netlist ...?

Category: Custom IC Design

By Prabhu The ICL
•
updated over 14 years ago by Quek

7 replies • 9737 views
Discussion

Making symbol text unselectable on an instance

Category: Custom IC Design

By swdesigner
•
started over 14 years ago

0 replies • 13679 views
Discussion

Re: How to do analog modeling with verilog -A

Category: Custom IC Design

By Analog Design
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updated over 14 years ago by Quek

1 replies • 558 views
Discussion

phase error in OTA amplifier

Category: Custom IC Design

By mozdas
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updated over 14 years ago by Quek

1 replies • 13411 views
Discussion

Virtuoso - how can I create an instance from a .inc HSPICE file?

Category: Custom IC Design

By Alex2kdl
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updated over 14 years ago by Quek

1 replies • 3007 views
Discussion

Snaping on StreamIn

Category: Custom IC Design

By JustinAtmel
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updated over 14 years ago by Quek

1 replies • 12967 views
Discussion

Exporting files

Category: Custom IC Design

By EveBell
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updated over 14 years ago by Quek

4 replies • 14400 views
Discussion

Assura LVS execution terminated

Category: Custom IC Design

By razvanm
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updated over 14 years ago by Quek

11 replies • 18611 views
Discussion

calibre rules conversion to assura rules?

Category: Custom IC Design

By linbo
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updated over 14 years ago by Quek

1 replies • 13633 views
Discussion

Connectivity Mark Net for temporary layers

Category: Custom IC Design

By mvalery
•
updated over 14 years ago by mvalery

2 replies • 13501 views

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