Custom IC Design

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Discussion

custum mdl functions in assertions

Category: Custom IC Design

By MarkSummers
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updated over 15 years ago by Andrew Beckett

1 replies • 13022 views
Discussion

Anyone used EQN(..) in Virtuoso-ADE->Setup Outputs?

Category: Custom IC Design

By swdesigner
•
updated over 15 years ago by Andrew Beckett

2 replies • 678 views
Discussion

Techgen + RCXdspfINIT

Category: Custom IC Design

By Slawa
•
updated over 15 years ago by Quek

9 replies • 9222 views
Discussion

Failed to get MPS handle

Category: Custom IC Design

By Nabavi
•
updated over 15 years ago by Nabavi

4 replies • 16121 views
Discussion

tran simulation shows bad result with nport, while AC is ok

Category: Custom IC Design

By TobiasM
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updated over 15 years ago by Andrew Beckett

1 replies • 14618 views
Discussion

using nport in Verilog-AMS

Category: Custom IC Design

By TobiasM
•
updated over 15 years ago by TobiasM

4 replies • 14865 views
Discussion

QRC + command file

Category: Custom IC Design

By Slawa
•
updated over 15 years ago by Quek

9 replies • 18400 views
Discussion

ADE XL: Problems using ocean script results after parametric analysis...

Category: Custom IC Design

By lperktold
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started over 15 years ago

0 replies • 13367 views
Discussion

selecting a particular iteration result for transient Monte Carlo sim in Ocean

Category: Custom IC Design

By mazinga
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started over 15 years ago

0 replies • 13167 views
Discussion

Cadence5, output pane, subtraction of two signals

Category: Custom IC Design

By StreamCX
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updated over 15 years ago by Andrew Beckett

3 replies • 11814 views
Discussion

Transient simulation with noise

Category: Custom IC Design

By archive
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updated over 15 years ago by Tawna

1 replies • 13035 views
Discussion

leHiCreateContact() not working

Category: Custom IC Design

By badry
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updated over 15 years ago by badry

4 replies • 13710 views
Discussion

cadence ic613 with assura32: warning about environment variable

Category: Custom IC Design

By iamlearning
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updated over 15 years ago by Quek

16 replies • 19153 views
Discussion

How to create templates for vdd/vss nets in Virtuoso

Category: Custom IC Design

By akbhide
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updated over 15 years ago by Andrew Beckett

4 replies • 4594 views
Discussion

how to calculate the delay and power dissipation in a circuit of cadence?

Category: Custom IC Design

By Preetisudha
•
updated over 15 years ago by Quek

10 replies • 21601 views

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