Custom IC Design

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Discussion

A question about displaying opPoints information ...?

Category: Custom IC Design

By Prabhu The ICL

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updated over 14 years ago by Quek

1 replies • 13237 views
Discussion

Mark Net and vias

Category: Custom IC Design

By Adrian Nistor

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started over 14 years ago

0 replies • 13140 views
Discussion

Diva extraction warnings on large layout

Category: Custom IC Design

By Zach

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updated over 14 years ago by Andrew Beckett

1 replies • 12881 views
Discussion

Jitter in Strong and Weak Inversions

Category: Custom IC Design

By pcardoso73

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updated over 14 years ago by pcardoso73

1 replies • 13117 views
Discussion

Regular expressions in a schematic search

Category: Custom IC Design

By J Wilwert

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updated over 14 years ago by J Wilwert

2 replies • 13294 views
Discussion

Problem in importing CDL/Spice netlist ...?

Category: Custom IC Design

By Prabhu The ICL

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updated over 14 years ago by Quek

7 replies • 9828 views
Discussion

Making symbol text unselectable on an instance

Category: Custom IC Design

By swdesigner

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started over 14 years ago

0 replies • 13767 views
Discussion

Re: How to do analog modeling with verilog -A

Category: Custom IC Design

By Analog Design

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updated over 14 years ago by Quek

1 replies • 569 views
Discussion

phase error in OTA amplifier

Category: Custom IC Design

By mozdas

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updated over 14 years ago by Quek

1 replies • 13497 views
Discussion

Virtuoso - how can I create an instance from a .inc HSPICE file?

Category: Custom IC Design

By Alex2kdl

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updated over 14 years ago by Quek

1 replies • 3052 views
Discussion

Snaping on StreamIn

Category: Custom IC Design

By JustinAtmel

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updated over 14 years ago by Quek

1 replies • 13054 views
Discussion

Exporting files

Category: Custom IC Design

By EveBell

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updated over 14 years ago by Quek

4 replies • 14529 views
Discussion

Assura LVS execution terminated

Category: Custom IC Design

By razvanm

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updated over 14 years ago by Quek

11 replies • 18778 views
Discussion

calibre rules conversion to assura rules?

Category: Custom IC Design

By linbo

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updated over 14 years ago by Quek

1 replies • 13732 views
Discussion

Connectivity Mark Net for temporary layers

Category: Custom IC Design

By mvalery

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updated over 14 years ago by mvalery

2 replies • 13592 views

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