• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    creating a matrix of instances in verilog-A

    Category: Custom IC Design

    By rickrevolta rickrevolta

    •

    updated over 15 years ago by Andrew Beckett

    2 replies • 16343 views
  • Discussion

    Pin names

    Category: Custom IC Design

    By StreamCX StreamCX

    •

    updated over 15 years ago by Andrew Beckett

    7 replies • 10293 views
  • Discussion

    LvsIgnore Properties

    Category: Custom IC Design

    By frogconsultant frogconsultant

    •

    updated over 15 years ago by frogconsultant

    12 replies • 30367 views
  • Discussion

    How to implement this equation in VerilogA

    Category: Custom IC Design

    By princemahmmod princemahmmod

    •

    updated over 15 years ago by Andrew Beckett

    4 replies • 15623 views
  • Discussion

    Cadence 6 waveform error vpwl vsrc

    Category: Custom IC Design

    By StreamCX StreamCX

    •

    updated over 15 years ago by StreamCX

    9 replies • 9023 views
  • Discussion

    Output SPEF-file from QRC contains only top level ports

    Category: Custom IC Design

    By Slawa Slawa

    •

    updated over 15 years ago by Quek

    1 replies • 6091 views
  • Discussion

    Off-Grid pins warning in abstract generation

    Category: Custom IC Design

    By affaq affaq

    •

    updated over 15 years ago by Alex Soyer

    3 replies • 13777 views
  • Discussion

    subciruit initiated top-level current probe

    Category: Custom IC Design

    By Kalimero Kalimero

    •

    updated over 15 years ago by Kalimero

    5 replies • 16248 views
  • Discussion

    cadence verilog ams environment setup question

    Category: Custom IC Design

    By Wing2 Wing2

    •

    updated over 15 years ago by EricCDN

    1 replies • 18137 views
  • Discussion

    How to short small resistor for lvs purpose

    Category: Custom IC Design

    By harleyMax harleyMax

    •

    updated over 15 years ago by Andrew Beckett

    7 replies • 19136 views
  • Discussion

    Manual editing of a p2lvsfile

    Category: Custom IC Design

    By Slawa Slawa

    •

    updated over 15 years ago by Slawa

    6 replies • 7463 views
  • Discussion

    How to change the Internal Cell names

    Category: Custom IC Design

    By sathisha sathisha

    •

    updated over 15 years ago by Quek

    1 replies • 14438 views
  • Discussion

    ASSURA41-614: ERROR rcAddRegionTasks

    Category: Custom IC Design

    By tkhan tkhan

    •

    updated over 15 years ago by Andrew Beckett

    3 replies • 13314 views
  • Discussion

    How to add PVS menu in virtuoso layout editor

    Category: Custom IC Design

    By shushan shushan

    •

    updated over 15 years ago by shushan

    2 replies • 14326 views
  • Discussion

    dose anyone know how to solve this problem???

    Category: Custom IC Design

    By Jay12 Jay12

    •

    updated over 15 years ago by Andrew Beckett

    1 replies • 12902 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information