Custom IC Design

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IC614 issues with $DISPLAY

Category: Custom IC Design

By tkhan

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updated over 13 years ago by tkhan

8 replies • 17006 views
Discussion

Skill code for extracting wire information for one signal

Category: Custom IC Design

By MYIN

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updated over 13 years ago by skillUser

3 replies • 14026 views
Discussion

Some weird things going on with properties in Layout

Category: Custom IC Design

By Kabal

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updated over 13 years ago by Kabal

1 replies • 12970 views
Discussion

ErcChk segmentation fault

Category: Custom IC Design

By mlxsae

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updated over 13 years ago by Quek

1 replies • 13695 views
Discussion

Matlab RF/Spectre Toolbox

Category: Custom IC Design

By BoulderDash

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updated over 13 years ago by nevinalex1234

5 replies • 3984 views
Discussion

Importing verilog to Cadence schematic

Category: Custom IC Design

By Wonyoung

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updated over 13 years ago by weebey

10 replies • 21581 views
Discussion

IC5141_USR6 in RHEL5

Category: Custom IC Design

By Satya

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updated over 13 years ago by DanL

8 replies • 14581 views
Discussion

Is it possible to convert layout.oa/sch.oa database format to text

Category: Custom IC Design

By ramiabr

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updated over 13 years ago by Quek

1 replies • 2023 views
Discussion

spectre

Category: Custom IC Design

By arundevnkumar

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updated over 13 years ago by Quek

1 replies • 12902 views
Discussion

setting snapMode to anyAngle in Virtuoso 6.1.5 using env var (SOLVED)

Category: Custom IC Design

By MOSFET

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updated over 13 years ago by Andrew Beckett

2 replies • 14505 views
Discussion

Defining length in an expression to be evaluated

Category: Custom IC Design

By canbaltaci

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updated over 13 years ago by Andrew Beckett

3 replies • 13827 views
Discussion

How to compile verilog file to valid IC6.x cellview from command prompt

Category: Custom IC Design

By aleksand1975

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updated over 13 years ago by aleksand1975

2 replies • 13729 views
Discussion

Simulating basic circuits using spice models

Category: Custom IC Design

By tc2566

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started over 13 years ago

0 replies • 13254 views
Discussion

monte carlo trimmed simulation in adexl (cadence 6)

Category: Custom IC Design

By Trevor1981

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updated over 13 years ago by Trevor1981

2 replies • 16092 views
Discussion

Question on Cadence Capacitor Output Templates

Category: Custom IC Design

By heartsoar

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updated over 13 years ago by Andrew Beckett

6 replies • 16176 views

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