Custom IC Design

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Discussion

LVS fails "nothing in layout"

Category: Custom IC Design

By nicola91it

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updated over 4 years ago by Reyvandi

4 replies • 8030 views
Discussion

issue in launching Technology file manager

Category: Custom IC Design

By skillEater

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updated over 4 years ago by Andrew Beckett

4 replies • 11246 views
Discussion

Define 2D parameter array in Verilog-A

Category: Custom IC Design

By rhanna

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updated over 4 years ago by Andrew Beckett

3 replies • 14225 views
Discussion

export and import in cadence

Category: Custom IC Design

By Farnaz

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updated over 4 years ago by Andrew Beckett

2 replies • 12210 views
Discussion

Declaration, Initialization and shifting real type arrays in VerilogAMS

Category: Custom IC Design

By RFStuff

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updated over 4 years ago by Andrew Beckett

5 replies • 14285 views
Discussion

Thermometer code

Category: Custom IC Design

By sidm

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updated over 4 years ago by sidm

6 replies • 18450 views
Discussion

How to use version control in IC615?

Category: Custom IC Design

By dogrush

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updated over 4 years ago by KonradMa

10 replies • 21207 views
Discussion

Accessing design variables in parametric set sweeps

Category: Custom IC Design

By Naci

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updated over 4 years ago by Naci

4 replies • 12214 views
Discussion

Can't probe terminal currents from symbols in PDK

Category: Custom IC Design

By mikewu

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updated over 4 years ago by Andrew Beckett

7 replies • 3626 views
Discussion

AMS simulation using smartview extraction

Category: Custom IC Design

By HasanArd

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updated over 4 years ago by Andrew Beckett

1 replies • 14658 views
Discussion

CAS Incomplete Net problem

Category: Custom IC Design

By Senan

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updated over 4 years ago by Senan

4 replies • 12951 views
Discussion

Import logo to Virtuoso schematic Editor

Category: Custom IC Design

By Richardv

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updated over 4 years ago by Pedro Cardoso

6 replies • 18050 views
Discussion

Accessing parametric set sweep results with referencing only the corresponding design point rather than each individual parameter value

Category: Custom IC Design

By Naci

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updated over 4 years ago by Naci

2 replies • 11651 views
Discussion

Debugging slowness in expression evaluation in ADE

Category: Custom IC Design

By Naci

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updated over 4 years ago by Naci

3 replies • 11824 views
Discussion

DRC Error

Category: Custom IC Design

By Hossein Eslahi

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updated over 4 years ago by antoniadm

1 replies • 12141 views

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