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Custom IC Design

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  • Discussion

    Diamond shape in the center of standardViaDefs device

    Category: Custom IC Design

    By dNora

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    started over 14 years ago

    0 replies • 13630 views
  • Discussion

    Problem in layout with new cadence

    Category: Custom IC Design

    By MariaOtz

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    •

    updated over 14 years ago by MariaOtz

    2 replies • 14088 views
  • Discussion

    how to fix "No DC path from node `gnd!' to ground"

    Category: Custom IC Design

    By asd1815

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    started over 14 years ago

    0 replies • 5572 views
  • Discussion

    A question about displaying opPoints information ...?

    Category: Custom IC Design

    By Prabhu The ICL

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    •

    updated over 14 years ago by Quek

    1 replies • 13958 views
  • Discussion

    Mark Net and vias

    Category: Custom IC Design

    By Adrian Nistor

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    started over 14 years ago

    0 replies • 13829 views
  • Discussion

    Diva extraction warnings on large layout

    Category: Custom IC Design

    By Zach

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    •

    updated over 14 years ago by Andrew Beckett

    1 replies • 13622 views
  • Discussion

    Jitter in Strong and Weak Inversions

    Category: Custom IC Design

    By pcardoso73

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    •

    updated over 14 years ago by pcardoso73

    1 replies • 13811 views
  • Discussion

    Regular expressions in a schematic search

    Category: Custom IC Design

    By J Wilwert

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    updated over 14 years ago by J Wilwert

    2 replies • 14085 views
  • Discussion

    Problem in importing CDL/Spice netlist ...?

    Category: Custom IC Design

    By Prabhu The ICL

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    •

    updated over 14 years ago by Quek

    7 replies • 10529 views
  • Discussion

    Making symbol text unselectable on an instance

    Category: Custom IC Design

    By swdesigner

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    •

    started over 14 years ago

    0 replies • 14433 views
  • Discussion

    Re: How to do analog modeling with verilog -A

    Category: Custom IC Design

    By Analog Design

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    updated over 14 years ago by Quek

    1 replies • 648 views
  • Discussion

    phase error in OTA amplifier

    Category: Custom IC Design

    By mozdas

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    •

    updated over 14 years ago by Quek

    1 replies • 14215 views
  • Discussion

    Virtuoso - how can I create an instance from a .inc HSPICE file?

    Category: Custom IC Design

    By Alex2kdl

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    updated over 14 years ago by Quek

    1 replies • 3416 views
  • Discussion

    Snaping on StreamIn

    Category: Custom IC Design

    By JustinAtmel

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    •

    updated over 14 years ago by Quek

    1 replies • 13752 views
  • Discussion

    Exporting files

    Category: Custom IC Design

    By EveBell

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    •

    updated over 14 years ago by Quek

    4 replies • 15420 views
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