Custom IC Design

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optimizing

Category: Custom IC Design

By martinmmuc

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updated over 14 years ago by Andrew Beckett

3 replies • 13375 views
Discussion

errors during LVS with RF Transistors @ IBM cms9flp pdk

Category: Custom IC Design

By jimito13

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updated over 14 years ago by jimito13

4 replies • 14290 views
Discussion

accessing the frequency parameter in an ac analysis

Category: Custom IC Design

By vivkr

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updated over 14 years ago by Frank Wiedmann

2 replies • 17466 views
Discussion

wavescan waveforms -> CIW?

Category: Custom IC Design

By markbeck

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updated over 14 years ago by ebecheto

9 replies • 3469 views
Discussion

Phase Noise and Jitter

Category: Custom IC Design

By pcardoso73

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updated over 14 years ago by pcardoso73

2 replies • 14446 views
Discussion

running IC5141 based Monte Carlo ocean scripts in IC61 OCEAN

Category: Custom IC Design

By NikhilCadence

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started over 14 years ago

0 replies • 12992 views
Discussion

Elaboration error in AMS simulator

Category: Custom IC Design

By kasyab

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updated over 14 years ago by kasyab

3 replies • 15807 views
Discussion

VerilogA Variables when using Trasient Restart in Spectre

Category: Custom IC Design

By TjaartOpperman

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updated over 14 years ago by Andrew Beckett

1 replies • 13412 views
Discussion

how to print node-to-node capacitance?

Category: Custom IC Design

By flying

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updated over 14 years ago by AndrewMac

5 replies • 17215 views
Discussion

Illegal hierarchical connection

Category: Custom IC Design

By MontyP

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updated over 14 years ago by Austin CAD Guy

6 replies • 15122 views
Discussion

Insufficient memory available on simulation using inductor

Category: Custom IC Design

By Wonyoung

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updated over 14 years ago by Wonyoung

7 replies • 14817 views
Discussion

Automatic Place and Route for a standard cell design using a single metal layer only

Category: Custom IC Design

By write2rammy

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started over 14 years ago

0 replies • 13433 views
Discussion

Is there a viewer for Spectre pwl statements out there ?

Category: Custom IC Design

By baenisch

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updated over 14 years ago by baenisch

2 replies • 13970 views
Discussion

Parametric Analysis on Multiple Cores

Category: Custom IC Design

By AndrewMac

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started over 14 years ago

0 replies • 13285 views
Discussion

Connecting multiple bits to same output bus in cadence schematic

Category: Custom IC Design

By roy83

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updated over 14 years ago by skillUser

3 replies • 16160 views

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