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Custom IC Design

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  • Discussion

    QRC Extraction - Assura

    Category: Custom IC Design

    By Paolo Minotti

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    updated over 10 years ago by Quek

    1 replies • 1983 views
  • Discussion

    Simulation of extraced view fails, due to missing supply nets in netlist

    Category: Custom IC Design

    By marten

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    updated over 10 years ago by Quek

    1 replies • 13156 views
  • Discussion

    [Solved] MIM capacitor is not being recognized during LVS

    Category: Custom IC Design

    By Subrata

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    updated over 10 years ago by Quek

    3 replies • 16978 views
  • Discussion

    Is it possible to run Assura LVS under Ubuntu 14.04?

    Category: Custom IC Design

    By R Wodnicki

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    •

    updated over 10 years ago by Quek

    1 replies • 13506 views
  • Discussion

    How do I get Assura to save DRC markers to the layout database like DIVA?

    Category: Custom IC Design

    By Michael L

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    •

    updated over 10 years ago by Quek

    1 replies • 13714 views
  • Discussion

    Assura RC deck working in PVS

    Category: Custom IC Design

    By nads

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    •

    updated over 10 years ago by Quek

    1 replies • 13874 views
  • Discussion

    Avoid unnecessary large file size in Cadence Transient Simulation

    Category: Custom IC Design

    By MenghanSun

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    •

    updated over 10 years ago by Subrata

    1 replies • 14570 views
  • Discussion

    ADEXL: detecting process corners

    Category: Custom IC Design

    By kawan

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    •

    updated over 10 years ago by kawan

    6 replies • 16787 views
  • Discussion

    vsource voltage level always 1V, val0 & val1 missing in netlist

    Category: Custom IC Design

    By marten

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    •

    updated over 10 years ago by marten

    4 replies • 1837 views
  • Discussion

    ADEXL: Preloading Multiple Runs

    Category: Custom IC Design

    By kawan

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    •

    updated over 10 years ago by kawan

    6 replies • 14479 views
  • Discussion

    Problem with QRC execution

    Category: Custom IC Design

    By w888ku

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    •

    updated over 10 years ago by w888ku

    2 replies • 13915 views
  • Discussion

    Ultrasim Error for Stitching

    Category: Custom IC Design

    By Cuong Truong

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    •

    updated over 10 years ago by Cuong Truong

    2 replies • 13126 views
  • Discussion

    [SOLVED] Verilog-AMS code doesn't compile with genvar

    Category: Custom IC Design

    By msharma

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    updated over 10 years ago by Andrew Beckett

    1 replies • 2717 views
  • Discussion

    measurements with transient sim with temp as a dynamic parameter

    Category: Custom IC Design

    By vamshiky

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    •

    updated over 10 years ago by Andrew Beckett

    2 replies • 13815 views
  • Discussion

    How to Plot the Outputs in Ocean

    Category: Custom IC Design

    By Teem

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    •

    updated over 10 years ago by Andrew Beckett

    2 replies • 13424 views
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