Custom IC Design

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Use device parameters in SPECTRE simulation

Category: Custom IC Design

By dime85

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started over 10 years ago

0 replies • 13507 views
Discussion

using veriloga models to simulate nfets and pfets

Category: Custom IC Design

By rpanock

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started over 10 years ago

0 replies • 12692 views
Discussion

How to choose the operating point displayed in IC6.1.6-64b.101 ?

Category: Custom IC Design

By Chrisss

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updated over 11 years ago by Chrisss

2 replies • 13256 views
Discussion

recording simulation time

Category: Custom IC Design

By milind0y

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updated over 11 years ago by milind0y

2 replies • 13334 views
Discussion

Looking for Assura command where it uses device sizes to eliminate circuit mapping ambiguity during comparison.

Category: Custom IC Design

By RockHopper

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started over 11 years ago

0 replies • 12706 views
Discussion

cdb to oa conversion VIA missing

Category: Custom IC Design

By Simon87

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updated over 11 years ago by theopaone

7 replies • 16279 views
Discussion

How to import/export y0,y1...y3 layers along with tech-layers

Category: Custom IC Design

By RFStuff

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updated over 11 years ago by theopaone

1 replies • 891 views
Discussion

ViVA setting to remember waveform setup

Category: Custom IC Design

By apple419

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updated over 11 years ago by apple419

3 replies • 16693 views
Discussion

How to align 45-degree edges?

Category: Custom IC Design

By DesmondLiu

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updated over 11 years ago by DesmondLiu

2 replies • 13228 views
Discussion

Positioning the instances in Layout editor by using SKILL

Category: Custom IC Design

By RFStuff

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updated over 11 years ago by Andrew Beckett

34 replies • 31985 views
Discussion

IC 6.1.6, ADE XL: Calculating scalar after the sweep using expression in Output tab

Category: Custom IC Design

By FormerMember

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updated over 11 years ago by FormerMember

2 replies • 3713 views
Discussion

Can no plot signals during Monte-Carlo tran simulation

Category: Custom IC Design

By Ozgur

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updated over 11 years ago by Tshun Kiat

6 replies • 16139 views
Discussion

Pnoise analysis

Category: Custom IC Design

By Jithin

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updated over 11 years ago by benlau

11 replies • 18540 views
Discussion

Creating symbol in schematic composer with @cellName NOT @partName

Category: Custom IC Design

By RFStuff

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updated over 11 years ago by RFStuff

2 replies • 14646 views
Discussion

Error while importing .gds in cadence IC 6.16

Category: Custom IC Design

By radiowaves

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updated over 11 years ago by Andrew Beckett

6 replies • 16451 views

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