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Custom IC Design

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  • Discussion

    From spectremdl to ultrasim : any cadence solution ?

    Category: Custom IC Design

    By samung

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    updated over 11 years ago by samung

    7 replies • 14697 views
  • Discussion

    Generating ocean script in Linux terminal.

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 11 years ago by skillUser

    3 replies • 14462 views
  • Discussion

    parametric analysis of mosfet length and width

    Category: Custom IC Design

    By madhanmo

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    •

    started over 11 years ago

    0 replies • 13711 views
  • Discussion

    Memory instance : ULTRASIM simulator setting

    Category: Custom IC Design

    By samung

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    •

    started over 11 years ago

    0 replies • 12906 views
  • Discussion

    ADEXL parametric sweep does not work

    Category: Custom IC Design

    By sram8t

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    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 14399 views
  • Discussion

    Extracted parameters do not match with the schematic.

    Category: Custom IC Design

    By jagadishdn

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    •

    updated over 11 years ago by jagadishdn

    2 replies • 13817 views
  • Discussion

    How to multiply a waveform with the x axis vector

    Category: Custom IC Design

    By milind0y

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    •

    updated over 11 years ago by milind0y

    2 replies • 16964 views
  • Discussion

    Layout Porting between Foundries

    Category: Custom IC Design

    By KKANDOTH

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    •

    updated over 11 years ago by theopaone

    5 replies • 16056 views
  • Discussion

    Link pin labels over hierarchy

    Category: Custom IC Design

    By Narasimhan90

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    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 13730 views
  • Discussion

    Knowing associated TECH-FILE location

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 17854 views
  • Discussion

    Entering infoname and info (captab) analysis in ADE

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 16331 views
  • Discussion

    Processing cadence result data from psf folder

    Category: Custom IC Design

    By RFStuff

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    •

    updated over 11 years ago by Andrew Beckett

    7 replies • 20293 views
  • Discussion

    NC-Verilog netlister setttings to output single netlist (not hierarchy-ihnl/ based)

    Category: Custom IC Design

    By jagarcia85

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    •

    updated over 11 years ago by Andrew Beckett

    3 replies • 14827 views
  • Discussion

    Zoom-in and Zoom-out graphics issues in Virtuso Layout Editor ( IC5141-sub-version 5.10.41.500.6.151)

    Category: Custom IC Design

    By RFStuff

    $usertype

    •

    updated over 11 years ago by Andrew Beckett

    1 replies • 14922 views
  • Discussion

    Annoying message about OS compatibility and SKILL IDE problem

    Category: Custom IC Design

    By Kovinko

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    •

    updated over 11 years ago by Andrew Beckett

    2 replies • 14645 views
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