Custom IC Design

Latest Posts

Discussion

How to netlist a VHDL-AMS generic of type "time" correctly in ADE?

Category: Custom IC Design

By Eckhard Hennig
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updated over 4 years ago by Andrew Beckett

2 replies • 1908 views
Discussion

save graphical waveforms into ADE-XL views just like a spectre state view

Category: Custom IC Design

By PBWU
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updated over 4 years ago by Andrew Beckett

3 replies • 12199 views
Discussion

How to set a pre-run MC simulation

Category: Custom IC Design

By Hannahyrh
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updated over 4 years ago by Andrew Beckett

1 replies • 10030 views
Discussion

hex variable to verilog module

Category: Custom IC Design

By amacSS
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updated over 4 years ago by amacSS

6 replies • 13876 views
Discussion

Is there a ready-to use oscillator model with PHN in Cadence available

Category: Custom IC Design

By HoWei
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updated over 4 years ago by FormerMember

3 replies • 10416 views
Discussion

Export the result wave and use it in other simulations?

Category: Custom IC Design

By FormerMember
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updated over 4 years ago by FormerMember

1 replies • 1409 views
Discussion

Including markers and ruler in layout image export

Category: Custom IC Design

By AndreyDM
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updated over 4 years ago by quyleanh

6 replies • 15797 views
Discussion

Get X-value from an expression that plots Frequency vs. Vtune

Category: Custom IC Design

By HoWei
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updated over 4 years ago by HoWei

6 replies • 13195 views
Discussion

Can you Store/Recall layer sets in Virtuoso?

Category: Custom IC Design

By CADcasualty
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updated over 4 years ago by CADcasualty

3 replies • 3004 views
Discussion

New Spectre MDL output in ADE Assembler / Explorer

Category: Custom IC Design

By FAwqati
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updated over 4 years ago by FAwqati

4 replies • 11585 views
Discussion

Global nets in the extracted view

Category: Custom IC Design

By iamKarthikBK
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updated over 4 years ago by cdonovan

8 replies • 17055 views
Discussion

Set the user interface to have the assistants hidden by default

Category: Custom IC Design

By greywanderer
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updated over 4 years ago by greywanderer

2 replies • 9743 views
Discussion

How can I find the voltage difference between two nodes?

Category: Custom IC Design

By yysunj
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updated over 4 years ago by yysunj

2 replies • 13530 views
Discussion

How Can I Pass a Variable-sized Array to an Analog User-defined Function in VerilogA?

Category: Custom IC Design

By rhanna
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updated over 4 years ago by Andrew Beckett

1 replies • 12372 views
Discussion

About User Command-Line Options in Environment Options

Category: Custom IC Design

By ichiro
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updated over 4 years ago by Andrew Beckett

7 replies • 17584 views

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