Custom IC Design

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Discussion

Models for components in sample lib

Category: Custom IC Design

By sidm

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updated over 4 years ago by sidm

6 replies • 12781 views
Discussion

Change default increment of deriv

Category: Custom IC Design

By Holz

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updated over 4 years ago by FormerMember

5 replies • 11461 views
Discussion

How can I import verilog-A (.va) file in the cadence virtuoso?

Category: Custom IC Design

By yysunj

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updated over 4 years ago by Andrew Beckett

1 replies • 10894 views
Discussion

PLL reference model for PSS+PNOISE

Category: Custom IC Design

By HoWei

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updated over 4 years ago by FormerMember

5 replies • 4433 views
Discussion

Maestro - use other output as spec value.

Category: Custom IC Design

By JeyJey

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updated over 4 years ago by JeyJey

6 replies • 4831 views
Discussion

How to plot current results along with last run results in the same window/tab in viva.

Category: Custom IC Design

By kenc184

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updated over 4 years ago by kenc184

4 replies • 4722 views
Discussion

write *.scs file to use model library

Category: Custom IC Design

By mirtaji65

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updated over 4 years ago by mirtaji65

2 replies • 12629 views
Discussion

Stimulating an internal node from a higher hierarchy level

Category: Custom IC Design

By Johanny Saenz

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updated over 4 years ago by Andrew Beckett

5 replies • 11685 views
Discussion

Running Monte Carlo simulations on a statistical corner in ADE XL

Category: Custom IC Design

By ddsab

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updated over 4 years ago by Andrew Beckett

3 replies • 16713 views
Discussion

Joining a line between two points on the output waveform in Cadence Virtuoso calculator tool

Category: Custom IC Design

By Senan

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updated over 4 years ago by Senan

2 replies • 11716 views
Discussion

DC operating point for different analyses

Category: Custom IC Design

By Banai

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updated over 4 years ago by Banai

4 replies • 15482 views
Discussion

Parasitic extraction tools for Cadence

Category: Custom IC Design

By omiya

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updated over 4 years ago by omiya

2 replies • 12850 views
Discussion

how to add printf statement to .cdsenv file?

Category: Custom IC Design

By KurtKimber1

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updated over 4 years ago by KurtKimber1

4 replies • 10778 views
Discussion

Print Noise summary and corresponding OCEAN noiseSummary

Category: Custom IC Design

By AncisMichele

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updated over 4 years ago by AncisMichele

15 replies • 16979 views
Discussion

Can the stb simulation in Spectre calculate the negative phase margin?

Category: Custom IC Design

By zuiying

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updated over 4 years ago by zuiying

11 replies • 19132 views

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