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Custom IC Design

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  • Discussion

    export ADE output expressions to CSV

    Category: Custom IC Design

    By yeh1 yeh1

    •

    updated over 4 years ago by yeh1

    2 replies • 14354 views
  • Discussion

    Run AMS simulation with ADE-L with import systemVerilogCustom_pkg::*

    Category: Custom IC Design

    By christinep christinep

    •

    updated over 4 years ago by Majdo

    3 replies • 16191 views
  • Discussion

    How to include an Instantiated Verilog cell in the config view of AMS simulation

    Category: Custom IC Design

    By RFStuff RFStuff

    •

    updated over 4 years ago by Majdo

    1 replies • 16509 views
  • Discussion

    group and ungroup in layout L

    Category: Custom IC Design

    By BaaB BaaB

    •

    updated over 4 years ago by BaaB

    10 replies • 19397 views
  • Discussion

    Ocean scripting

    Category: Custom IC Design

    By saorishabh saorishabh

    •

    updated over 4 years ago by saorishabh

    2 replies • 11580 views
  • Discussion

    How to turn OFF DRC Check during layouting

    Category: Custom IC Design

    By Casp Casp

    •

    updated over 4 years ago by Andrew Beckett

    6 replies • 21985 views
  • Discussion

    How to Describe Branch Current with Bsource

    Category: Custom IC Design

    By Chiaos Chiaos

    •

    updated over 4 years ago by Andrew Beckett

    4 replies • 12569 views
  • Discussion

    Setting port order of symbol view using SKILL

    Category: Custom IC Design

    By Sheppy Sheppy

    •

    updated over 4 years ago by Andrew Beckett

    3 replies • 16664 views
  • Discussion

    How to model bidir switch in RNM

    Category: Custom IC Design

    By dontknow dontknow

    •

    updated over 4 years ago by Frank Wiedmann

    5 replies • 14350 views
  • Discussion

    Schematics On White Background

    Category: Custom IC Design

    By switchy switchy

    •

    updated over 4 years ago by Andrew Beckett

    2 replies • 14546 views
  • Discussion

    Error detected in psf library while writing to file `tran.tran'.

    Category: Custom IC Design

    By NupurSpectre NupurSpectre

    •

    updated over 4 years ago by Andrew Beckett

    4 replies • 6435 views
  • Discussion

    Simulate variable number of symbol blocks

    Category: Custom IC Design

    By KenKim KenKim

    •

    started over 4 years ago

    0 replies • 10804 views
  • Discussion

    same schematic and analysis - different results?

    Category: Custom IC Design

    By JorisLambrecht JorisLambrecht

    •

    updated over 4 years ago by FormerMember

    8 replies • 5059 views
  • Discussion

    Will RHEL 8 work with IC6.1.8

    Category: Custom IC Design

    By wgtkan wgtkan

    •

    updated over 4 years ago by Quek

    1 replies • 13998 views
  • Discussion

    Differential Pair Measurement

    Category: Custom IC Design

    By KenKim KenKim

    •

    updated over 4 years ago by KenKim

    4 replies • 11966 views
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