Custom IC Design

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Spikes on my signal

Category: Custom IC Design

By Soly

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updated over 3 years ago by FormerMember

5 replies • 11116 views
Discussion

STT MTJ Model

Category: Custom IC Design

By Aswathyn

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started over 3 years ago

0 replies • 8700 views
Discussion

cannot delete extraction cellview

Category: Custom IC Design

By delgsy

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updated over 3 years ago by Andrew Beckett

1 replies • 8456 views
Discussion

Layour Passing LVS but failing passing PEX extracting calibre. Anyone know why?

Category: Custom IC Design

By FlyingAlbatross

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updated over 3 years ago by Andrew Beckett

1 replies • 11271 views
Discussion

Undo history cleared when saving layout

Category: Custom IC Design

By RicardoGV1

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updated over 3 years ago by Andrew Beckett

4 replies • 11141 views
Discussion

Saving and plotting internal signals within the DSPF extracted view in ADE Explorer

Category: Custom IC Design

By Victor Camacho

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updated over 3 years ago by FormerMember

3 replies • 16205 views
Discussion

what is the meaning of iprobe component in analogLib?

Category: Custom IC Design

By Gordon1002

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updated over 3 years ago by FormerMember

2 replies • 14177 views
Discussion

Plotting from ADE Explorer (netl err)

Category: Custom IC Design

By Sepide

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updated over 3 years ago by Andrew Beckett

5 replies • 17122 views
Discussion

FFT of a signal

Category: Custom IC Design

By Firdos

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updated over 3 years ago by Firdos

5 replies • 18610 views
Discussion

Signal doesn't reach full swing (0 -> VDD) in post-layout spectre tran-simulation

Category: Custom IC Design

By iq79

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updated over 3 years ago by FormerMember

11 replies • 4959 views
Discussion

viaMap in streamout.

Category: Custom IC Design

By kenc184

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updated over 3 years ago by kenc184

2 replies • 9213 views
Discussion

MTS - how to use cells with identical library name but under different PDKs

Category: Custom IC Design

By hkhatri

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updated over 3 years ago by Andrew Beckett

1 replies • 812 views
Discussion

Layout of the technology cells are distorted

Category: Custom IC Design

By Rezara

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updated over 3 years ago by Rezara

2 replies • 8333 views
Discussion

Fatal error found by spectre during topology check.

Category: Custom IC Design

By Aswathyn

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updated over 3 years ago by Andrew Beckett

9 replies • 13298 views
Discussion

Monte Carlo: How to use different configs during calibration and simulation while keeping corner and mismatch information

Category: Custom IC Design

By ExcaIibur

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updated over 3 years ago by JohnTweed

1 replies • 9027 views

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