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Custom IC Design

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  • Discussion

    Set default simulator to Spectre X

    Category: Custom IC Design

    By switchy

    $usertype

    •

    updated over 5 years ago by switchy

    2 replies • 13166 views
  • Discussion

    Plot horizontal line (e.g. limit line) in ViVa

    Category: Custom IC Design

    By HoWei

    $usertype

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    updated over 5 years ago by HoWei

    2 replies • 14123 views
  • Discussion

    Is there some way to calculate power consumption of blocks in a schematic automatically?

    Category: Custom IC Design

    By BaaB

    $usertype

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    started over 5 years ago

    0 replies • 12366 views
  • Discussion

    bindkey to open calibre nmDRC & nmLVS & PEX

    Category: Custom IC Design

    By sjwprcker

    $usertype

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    updated over 5 years ago by Andrew Beckett

    1 replies • 1455 views
  • Discussion

    Plot using waveVsWave function

    Category: Custom IC Design

    By Pedro Cardoso

    $usertype

    •

    updated over 5 years ago by Pedro Cardoso

    3 replies • 16014 views
  • Discussion

    Noise Contribution and Simulation in Cadence.

    Category: Custom IC Design

    By Yasir Shafi

    $usertype

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    updated over 5 years ago by FormerMember

    1 replies • 14800 views
  • Discussion

    Spectre model aliasing

    Category: Custom IC Design

    By CSCNalu

    $usertype

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    updated over 5 years ago by Andrew Beckett

    1 replies • 13076 views
  • Discussion

    would it be possible to copy a component or block inside a symbol when you descend into a block and copy it out?

    Category: Custom IC Design

    By BaaB

    $usertype

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    updated over 5 years ago by Andrew Beckett

    3 replies • 14685 views
  • Discussion

    Setting PVS for DRC and LVS (tsmcN28)

    Category: Custom IC Design

    By snezana111

    $usertype

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    updated over 5 years ago by jdimov

    3 replies • 23688 views
  • Discussion

    Assura QRC error

    Category: Custom IC Design

    By 24VS

    $usertype

    •

    started over 5 years ago

    0 replies • 12157 views
  • Discussion

    Finfet Stacked CMOS oppoint problem

    Category: Custom IC Design

    By JoshuaXiang

    $usertype

    •

    updated over 5 years ago by JoshuaXiang

    1 replies • 13303 views
  • Discussion

    Can Liberate take encrypted spice netlist?

    Category: Custom IC Design

    By mailinh

    $usertype

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 12386 views
  • Discussion

    Edit Synchronous clone

    Category: Custom IC Design

    By budman

    $usertype

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 12877 views
  • Discussion

    Is there a way to resume a cadence virtuoso that got stuck?

    Category: Custom IC Design

    By venkmanbuster

    $usertype

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    updated over 5 years ago by Andrew Beckett

    1 replies • 14186 views
  • Discussion

    ModGen tool is violating the DRC rules

    Category: Custom IC Design

    By Senan

    $usertype

    •

    updated over 5 years ago by Andrew Beckett

    1 replies • 12500 views
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