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Custom IC Design

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  • Discussion

    Bit streaming in Vector - in defined period

    Category: Custom IC Design

    By SC202503233131

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 752 views
  • Discussion

    Problem with a waveform

    Category: Custom IC Design

    By tomgerga

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3888 views
  • Discussion

    ADE XL simulation efficiency and errors

    Category: Custom IC Design

    By dogman4

    •

    updated over 1 year ago by Andrew Beckett

    5 replies • 5567 views
  • Discussion

    ERROR (LMF-02096)

    Category: Custom IC Design

    By CB202409064221

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 4390 views
  • Discussion

    conditional variable based type of test

    Category: Custom IC Design

    By sjwprcssw

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3125 views
  • Discussion

    PSF_utils not working on binary psf folder

    Category: Custom IC Design

    By Shlok Vaibhav

    •

    updated over 1 year ago by Andrew Beckett

    3 replies • 5386 views
  • Discussion

    Erroneous report in EMIR tool shows failed nets as passed.

    Category: Custom IC Design

    By unSkilled

    •

    started over 1 year ago

    0 replies • 2969 views
  • Discussion

    Verilog-A module for calculation of average 100 MHz continuous input signal (unaccurate results when analyzing in WaveView; transient sim in spectre)

    Category: Custom IC Design

    By FC202502053712

    •

    started over 1 year ago

    0 replies • 3127 views
  • Discussion

    trouble opening new cellview

    Category: Custom IC Design

    By SH202501029855

    •

    updated over 1 year ago by SH202501029855

    2 replies • 3922 views
  • Discussion

    Nonlinear (voltage dependent) resistor model

    Category: Custom IC Design

    By MikeA

    •

    updated over 1 year ago by MikeA

    3 replies • 4073 views
  • Discussion

    Nonlinear static block in tabular form

    Category: Custom IC Design

    By MikeA

    •

    updated over 1 year ago by MikeA

    2 replies • 3453 views
  • Discussion

    How to disable modelFiles display in the viva plot?

    Category: Custom IC Design

    By sjwprcker

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3321 views
  • Discussion

    How to change text alignment in "Description" column of ADE Explorer

    Category: Custom IC Design

    By Volker T

    •

    updated over 1 year ago by Volker T

    2 replies • 1047 views
  • Discussion

    error of laplace_zp in verilogA

    Category: Custom IC Design

    By sjwprcker

    •

    updated over 1 year ago by sjwprcker

    2 replies • 4089 views
  • Discussion

    VCD File Simulation using Spectre

    Category: Custom IC Design

    By VK202409108412

    •

    updated over 1 year ago by VK202409108412

    5 replies • 7815 views
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