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Custom IC Design

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  • Discussion

    DRC check in Integrated PVS environment

    Category: Custom IC Design

    By lowpower

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    updated over 8 years ago by lowpower

    4 replies • 14223 views
  • Discussion

    iterated instance with different views to use, hierarchy configuration

    Category: Custom IC Design

    By dani0815

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    updated over 8 years ago by dani0815

    2 replies • 14762 views
  • Discussion

    NF of Demodulator

    Category: Custom IC Design

    By EngrZM

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    updated over 8 years ago by Andrew Beckett

    1 replies • 13157 views
  • Discussion

    drawing/logo in a schematic view

    Category: Custom IC Design

    By Aldo2

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    updated over 8 years ago by drdanmc

    9 replies • 8955 views
  • Discussion

    Spectre VS Hspice in simulation speed- questions and concerns.

    Category: Custom IC Design

    By Alex Liao

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    updated over 8 years ago by Andrew Beckett

    1 replies • 3331 views
  • Discussion

    Usage of variables belonged to different measurement functions in spectremdl

    Category: Custom IC Design

    By saikatc

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    updated over 8 years ago by saikatc

    5 replies • 14247 views
  • Discussion

    matlab interface and PSF data format

    Category: Custom IC Design

    By vlau2

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    updated over 8 years ago by jfosorio

    6 replies • 19126 views
  • Discussion

    resistor noise simulation by transient analysis

    Category: Custom IC Design

    By rfham

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    updated over 8 years ago by rfham

    7 replies • 21310 views
  • Discussion

    Well proximity parameters (scc,scb,scc) used in PLS simulation

    Category: Custom IC Design

    By anandmohan

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    updated over 8 years ago by Andrew Beckett

    1 replies • 4737 views
  • Discussion

    How to differentiate trace name using "Plot signals from all the open DBs" in ViVA XL browser mode?

    Category: Custom IC Design

    By jwchoi

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    updated over 8 years ago by Andrew Beckett

    1 replies • 1354 views
  • Discussion

    How to use Join Nets Function in Cadence PVS-LVS

    Category: Custom IC Design

    By pz5921087

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    updated over 8 years ago by Andrew Beckett

    5 replies • 17995 views
  • Discussion

    Syntax for device check violation file assert statement

    Category: Custom IC Design

    By highspeedio

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    updated over 8 years ago by Frank Wiedmann

    1 replies • 16301 views
  • Discussion

    QRC extraction & BUS

    Category: Custom IC Design

    By Zdeno

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    updated over 8 years ago by Andrew Beckett

    6 replies • 3013 views
  • Discussion

    Align Figure groups together

    Category: Custom IC Design

    By MatthewLove

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    updated over 8 years ago by MatthewLove

    5 replies • 14212 views
  • Discussion

    scs file calls a verilogA

    Category: Custom IC Design

    By samer1

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    updated over 8 years ago by samer1

    2 replies • 14298 views
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