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Community Custom IC Design

Custom IC Design

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  • Discussion

    Drawing with Viva

    Category: Custom IC Design

    By BradW BradW

    •

    updated over 13 years ago by Andrew Beckett

    1 replies • 13539 views
  • Discussion

    IC6.14, Issues with Hierarchy in schematics

    Category: Custom IC Design

    By Kabal Kabal

    •

    updated over 13 years ago by Kabal

    2 replies • 13561 views
  • Discussion

    IBM_PDK 7RF, IC6.14, Extraction of circuit

    Category: Custom IC Design

    By Kabal Kabal

    •

    updated over 13 years ago by Kabal

    5 replies • 12683 views
  • Discussion

    Problem with cdsdoc (version2.1) of hotfix IC 5141

    Category: Custom IC Design

    By RAO VINAY RAO VINAY

    •

    updated over 13 years ago by RAO VINAY

    6 replies • 13662 views
  • Discussion

    How transient operating point is calculated in cadence

    Category: Custom IC Design

    By prashu prashu

    •

    updated over 13 years ago by imagesensor123

    27 replies • 29121 views
  • Discussion

    mapping logical libraries in AMS Designer (VHDL)

    Category: Custom IC Design

    By FedericoPI FedericoPI

    •

    updated over 13 years ago by FedericoPI

    7 replies • 15587 views
  • Discussion

    how to simulate device noise when the circuit has chopping block

    Category: Custom IC Design

    By kunmingcai kunmingcai

    •

    updated over 13 years ago by Andrew Beckett

    3 replies • 13559 views
  • Discussion

    PDK update

    Category: Custom IC Design

    By Aram Shahinyan Aram Shahinyan

    •

    updated over 13 years ago by Aram Shahinyan

    2 replies • 12860 views
  • Discussion

    Corner Analysis with IC6.1.3 and AMS HIT-Kit v4.00

    Category: Custom IC Design

    By dineshp dineshp

    •

    updated over 13 years ago by dineshp

    2 replies • 13273 views
  • Discussion

    Biasing technics for Diffpair(or opamp)

    Category: Custom IC Design

    By venuuuuu venuuuuu

    •

    updated over 13 years ago by Quek

    1 replies • 544 views
  • Discussion

    vpwlf error: Time is not strictly increasing

    Category: Custom IC Design

    By surreyian surreyian

    •

    updated over 13 years ago by surreyian

    6 replies • 18212 views
  • Discussion

    Illogical outputs from cadence (IC5141) ADE.

    Category: Custom IC Design

    By RAO VINAY RAO VINAY

    •

    updated over 13 years ago by RAO VINAY

    2 replies • 12345 views
  • Discussion

    How to Find the drawn net("MET1" "drawing") in the layout.

    Category: Custom IC Design

    By ShrikantTI ShrikantTI

    •

    updated over 13 years ago by Andrew Beckett

    4 replies • 2193 views
  • Discussion

    Assura LVS: Clarification on virtual connection using joinablePin() function.

    Category: Custom IC Design

    By ShrikantTI ShrikantTI

    •

    updated over 13 years ago by Quek

    1 replies • 13572 views
  • Discussion

    effective length variation after Monte Carlo trial

    Category: Custom IC Design

    By inessadm inessadm

    •

    updated over 13 years ago by Andrew Beckett

    6 replies • 13913 views
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