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Custom IC Design

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  • Discussion

    Netlist error

    Category: Custom IC Design

    By BARID

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    updated over 1 year ago by Andrew Beckett

    9 replies • 10885 views
  • Discussion

    Maestro - output expression values with suffix notation instead of engineering

    Category: Custom IC Design

    By firebolt3

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    updated over 1 year ago by Andrew Beckett

    1 replies • 1068 views
  • Discussion

    Question about skill script for Schematic rules checks

    Category: Custom IC Design

    By gkasap92

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    •

    updated over 1 year ago by gkasap92

    2 replies • 5555 views
  • Discussion

    How to include bidirectional signals in VCD files

    Category: Custom IC Design

    By DomiHammerfall

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    started over 1 year ago

    0 replies • 4647 views
  • Discussion

    Issue using vpwl

    Category: Custom IC Design

    By spatz

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    updated over 1 year ago by spatz

    3 replies • 6314 views
  • Discussion

    abstract generator - are there absSetBinOption function descriptions available ?

    Category: Custom IC Design

    By drosi

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    started over 1 year ago

    0 replies • 484 views
  • Discussion

    Saving Internal Junction Temperature of VBIC Bipolar Transistor Model

    Category: Custom IC Design

    By sgcad

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    •

    updated over 1 year ago by sgcad

    5 replies • 6833 views
  • Discussion

    How can I take a real value and assign it to a node in this case the output port of my module

    Category: Custom IC Design

    By Wasif Absar

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    updated over 1 year ago by Wasif Absar

    2 replies • 5196 views
  • Discussion

    ADC Verification Workshop link is showing as retired,can I get this content, please

    Category: Custom IC Design

    By RanjithD

    $usertype

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    updated over 1 year ago by Andrew Beckett

    1 replies • 1660 views
  • Discussion

    AOP Netlisting failed because of errors in callback

    Category: Custom IC Design

    By Monarch03116

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    updated over 1 year ago by Andrew Beckett

    1 replies • 4897 views
  • Discussion

    How to get an I-V curve like this?

    Category: Custom IC Design

    By Doronzzz

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    updated over 1 year ago by Frank Wiedmann

    5 replies • 6084 views
  • Discussion

    Run multiple same type analysis in IC 23.1 ADE

    Category: Custom IC Design

    By SimbaG

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    updated over 1 year ago by Andrew Beckett

    5 replies • 7430 views
  • Discussion

    Spectre X Transient Simulation Discrepancy vs. Spectre APS

    Category: Custom IC Design

    By jacob.sillman

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    updated over 1 year ago by jacob.sillman

    4 replies • 7011 views
  • Discussion

    Source setlist references but does not define...

    Category: Custom IC Design

    By gsciller

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    updated over 1 year ago by gsciller

    2 replies • 5424 views
  • Discussion

    Using _ansCdlSubcktCall to netlist but inherited sub pin not netlisting

    Category: Custom IC Design

    By rglenf

    $usertype

    •

    updated over 1 year ago by rglenf

    2 replies • 1336 views
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