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Digital Implementation

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  • Discussion

    Can SRoute route to the line shape pin of Vdd and GND?

    Category: Digital Implementation

    By Renee Renee

    •

    updated over 17 years ago by Kari

    3 replies • 13513 views
  • Discussion

    xilinx xc9500 and orcad

    Category: Digital Implementation

    By jyoung jyoung

    •

    updated over 17 years ago by archive

    1 replies • 12930 views
  • Discussion

    The viaGen found no shadow vias to rebuild

    Category: Digital Implementation

    By archive archive

    •

    updated over 17 years ago by Renee

    2 replies • 13134 views
  • Discussion

    Xilinx xc9500 and orcad 10.5

    Category: Digital Implementation

    By jyoung jyoung

    •

    started over 17 years ago

    0 replies • 12710 views
  • Discussion

    How to connect endcap cell vertically in soc encounter?

    Category: Digital Implementation

    By Renee Renee

    •

    updated over 17 years ago by Kari

    10 replies • 15833 views
  • Discussion

    replace library cells

    Category: Digital Implementation

    By designer designer

    •

    updated over 17 years ago by designer

    2 replies • 13266 views
  • Discussion

    error after CTS: ERROR:TCLCMD-917

    Category: Digital Implementation

    By kulprashant kulprashant

    •

    updated over 17 years ago by kulprashant

    10 replies • 5435 views
  • Discussion

    Why encounter places std cells on macro?

    Category: Digital Implementation

    By archive archive

    •

    updated over 17 years ago by ScreenName

    1 replies • 13123 views
  • Discussion

    How to set global clock signal routing in soc encounter?

    Category: Digital Implementation

    By Renee Renee

    •

    updated over 17 years ago by Kari

    1 replies • 13070 views
  • Discussion

    senthesize sub-module

    Category: Digital Implementation

    By designer designer

    •

    started over 17 years ago

    0 replies • 12850 views
  • Discussion

    soc encounter output to Magic

    Category: Digital Implementation

    By Renee Renee

    •

    updated over 17 years ago by Renee

    4 replies • 13534 views
  • Discussion

    First Encounter pin placement/layer

    Category: Digital Implementation

    By archive archive

    •

    updated over 17 years ago by Kari

    9 replies • 8004 views
  • Discussion

    Number of Non Equivalence Points after comparison in LEC Conformal

    Category: Digital Implementation

    By Azhar Azhar

    •

    updated over 17 years ago by Azhar

    1 replies • 14713 views
  • Discussion

    Encounter/Nanoroute - fixing DRC violations while keeping critical pre-routes untouched

    Category: Digital Implementation

    By ccabal ccabal

    •

    updated over 17 years ago by ccabal

    4 replies • 5323 views
  • Discussion

    Disable clock gating check for a module.

    Category: Digital Implementation

    By Tongju Tongju

    •

    started over 17 years ago

    0 replies • 15569 views
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