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Digital Implementation

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  • Discussion

    Cadence Innovus: Corner pads placed with no offset

    Category: Digital Implementation

    By rschilling

    •

    updated over 8 years ago by rschilling

    1 replies • 17370 views
  • Discussion

    SDF back annotation after synthesis fails: No timing checks annotated

    Category: Digital Implementation

    By rschilling

    •

    started over 8 years ago

    0 replies • 23939 views
  • Discussion

    Reporting IO latency during PostCTS stage

    Category: Digital Implementation

    By sasikg59

    •

    started over 8 years ago

    0 replies • 16080 views
  • Discussion

    Propagated clock for reg2out

    Category: Digital Implementation

    By Aram Shahinyan

    •

    updated over 8 years ago by sasikg59

    9 replies • 21064 views
  • Discussion

    Macro Placement Issue with Custom LEF file

    Category: Digital Implementation

    By kevinSh

    •

    updated over 8 years ago by Kari

    1 replies • 16272 views
  • Discussion

    clock tree synthesis

    Category: Digital Implementation

    By oAwad

    •

    updated over 8 years ago by Kari

    3 replies • 16366 views
  • Discussion

    Inserting a PIN definition in the SPECIALNETS section instead of the PINS section

    Category: Digital Implementation

    By RubenReyes

    •

    updated over 8 years ago by Kari

    1 replies • 15213 views
  • Discussion

    Exclude one clock from clock tree synthesis

    Category: Digital Implementation

    By Clidre

    •

    updated over 8 years ago by Kari

    1 replies • 15526 views
  • Discussion

    SOC encounter: short drc error on a particular cell

    Category: Digital Implementation

    By Angela Wang

    •

    updated over 8 years ago by Kari

    1 replies • 15464 views
  • Discussion

    [Voltus] set_pg_library_mode command option -power_pins?

    Category: Digital Implementation

    By JonathanGu

    •

    updated over 8 years ago by Kari

    5 replies • 3956 views
  • Discussion

    Innovus Common UI

    Category: Digital Implementation

    By Yemelya

    •

    updated over 8 years ago by Kari

    1 replies • 16033 views
  • Discussion

    encounter SEGV internal error (with optDesign -postRoute)

    Category: Digital Implementation

    By MadapusiSriniv

    •

    updated over 8 years ago by Kari

    2 replies • 1980 views
  • Discussion

    POwer routing : Top level Block PG pin routing

    Category: Digital Implementation

    By remi pallas

    •

    updated over 8 years ago by remi pallas

    2 replies • 17730 views
  • Discussion

    Encounter via placement rules

    Category: Digital Implementation

    By masserg

    •

    started over 8 years ago

    0 replies • 5371 views
  • Discussion

    ccopt ignore sink - common ui

    Category: Digital Implementation

    By Yemelya

    •

    updated over 8 years ago by HDar

    2 replies • 4724 views
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