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Functional Verification

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  • Discussion

    How attach/detach windows in SimVision?

    Category: Functional Verification

    By amnldm amnldm

    •

    updated over 2 years ago by StephenH

    1 replies • 1290 views
  • Discussion

    Extract FSM explicity

    Category: Functional Verification

    By snitkau snitkau

    •

    updated over 2 years ago by StephenH

    1 replies • 6290 views
  • Discussion

    Memory Viewer formatting

    Category: Functional Verification

    By HardDiskJockey HardDiskJockey

    •

    updated over 2 years ago by carloscrum

    1 replies • 6762 views
  • Discussion

    xrun slow snapshot loading

    Category: Functional Verification

    By alexek alexek

    •

    updated over 2 years ago by alexek

    4 replies • 7975 views
  • Discussion

    Merging the coverage will overwrite the covergroup reports?

    Category: Functional Verification

    By akagamisg akagamisg

    •

    updated over 2 years ago by StephenH

    1 replies • 5870 views
  • Discussion

    Debugging constraints with tcl interactive debug mode

    Category: Functional Verification

    By chetan somana chetan somana

    •

    updated over 2 years ago by chetan somana

    7 replies • 9033 views
  • Discussion

    Is it possible to connect two workspace/simulations via DPI-C?

    Category: Functional Verification

    By mxlusereight mxlusereight

    •

    updated over 2 years ago by StephenH

    1 replies • 1235 views
  • Discussion

    Free version of NC-Verilog

    Category: Functional Verification

    By Daniel Figueiredo Daniel Figueiredo

    •

    updated over 2 years ago by StephenH

    3 replies • 7761 views
  • Discussion

    Irun error MXINDR with a verilog PLL model wrapper written in VHDL, any way to workaround?

    Category: Functional Verification

    By mxlusereight mxlusereight

    •

    updated over 2 years ago by mxlusereight

    2 replies • 6447 views
  • Discussion

    How to Map covergroup from present regression database to a reference vPlan

    Category: Functional Verification

    By Rolly Rolly

    •

    updated over 2 years ago by StephenH

    1 replies • 6431 views
  • Discussion

    Xcelium waveform dump into custom directory

    Category: Functional Verification

    By DamianRRR DamianRRR

    •

    updated over 2 years ago by StephenH

    1 replies • 8532 views
  • Discussion

    System Verilog: always @( * ) is not working, but explicit declaration always @( s1, s1, s3) is working

    Category: Functional Verification

    By HoWei HoWei

    •

    updated over 2 years ago by HoWei

    5 replies • 11650 views
  • Discussion

    Jaspergold -- Net does not have a driver

    Category: Functional Verification

    By Vivek Kakkireni Vivek Kakkireni

    •

    updated over 2 years ago by ErikSeligman

    1 replies • 2398 views
  • Discussion

    How do I add signal probes to Simvision waveform viewer?

    Category: Functional Verification

    By ianmurph ianmurph

    •

    updated over 2 years ago by StephenH

    19 replies • 23720 views
  • Discussion

    What is Xcelium's equivalent of VCS's deraceclockdata option?

    Category: Functional Verification

    By Vijayvithal Vijayvithal

    •

    updated over 2 years ago by StephenH

    3 replies • 4598 views
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