Functional Verification

Latest Posts

Discussion

Can't collect AXI4 burst_started coverage

Category: Functional Verification

By kkurenkov
•
updated over 6 years ago by StephenH

1 replies • 1566 views
Discussion

How do we use the concept of Save and Restore during real developing(debugging)???/

Category: Functional Verification

By techy99
•
updated over 6 years ago by pvp kumar

2 replies • 6965 views
Discussion

IMC : fsm coding style not auto extracted/Identified by IMC

Category: Functional Verification

By garika
•
updated over 6 years ago by StephenH

1 replies • 2376 views
Discussion

IMC: toggle coverage for package array

Category: Functional Verification

By kkurenkov
•
updated over 6 years ago by kkurenkov

2 replies • 18669 views
Discussion

integration verification

Category: Functional Verification

By hardware
•
updated over 6 years ago by AteInfochips

2 replies • 15616 views
Discussion

Interface port coercion

Category: Functional Verification

By int19
•
updated over 6 years ago by OmidTaheri

3 replies • 22811 views
Discussion

Design library not defined while reading module with ncsim

Category: Functional Verification

By cuonghl
•
updated over 6 years ago by cuonghl

4 replies • 23192 views
Discussion

[IMC] Toggle coverage report

Category: Functional Verification

By NabilE
•
updated over 6 years ago by NabilE

2 replies • 18224 views
Discussion

How to make defparam disappear in netlist generated by NC-verilog in Cadence

Category: Functional Verification

By Darkhorse
•
updated over 6 years ago by StephenH

1 replies • 15354 views
Discussion

VPlan Report- links for each test

Category: Functional Verification

By mxm1489
•
updated over 6 years ago by StephenH

1 replies • 1745 views
Discussion

VManager wrongly imports failed test as passed

Category: Functional Verification

By GxxCxx
•
updated over 6 years ago by StephenH

1 replies • 16724 views
Discussion

Export a Breakpoint

Category: Functional Verification

By Elnic8745
•
updated over 6 years ago by Doug Koslow

3 replies • 16840 views
Discussion

NCLaunch VHDL compiler *F,DLUNNE error

Category: Functional Verification

By yavuzselim
•
started over 6 years ago

0 replies • 1278 views
Discussion

vManager tool gives this error-"Error:Project Environment Selection is required by server,and must be set on this mode"

Category: Functional Verification

By rahul97
•
updated over 6 years ago by DerekG0

3 replies • 3749 views
Discussion

$xm_deposit in gate level simulation

Category: Functional Verification

By mxm1489
•
updated over 6 years ago by mxm1489

2 replies • 20877 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.