Functional Verification

Problem with user define net types resolution functions

Category: Functional Verification

I am checking the code coverage for one of my Module's testbench, but the expression coverage is appearing as "n/a" , why is that so ? there are if-else & assignments in the RTL... how do I enable it ?

Category: Functional Verification

Quickly schematic-viewing a gates file

Category: Functional Verification

[AHB eVC]Unexpected 1ps delay on BFM

Category: Functional Verification

How to generate illegal AHB transactions using eVC

Category: Functional Verification

Black Blox Creation

Category: Functional Verification

[SV] Constraint solver issue

Category: Functional Verification

[AHB eVC]How to send transfers with no IDLE cycles

Category: Functional Verification

ahb evc: Hw can I do a random back to back transfer with random address

Category: Functional Verification

How do I instantiate a UVM agent with a monitor, functional coverage and scoreboard in a legacy testbench

Category: Functional Verification

ncsim problem in AMS simulation

Category: Functional Verification

K-i-t-c-h-e-n-s For Sale Exeter Area UK

Category: Functional Verification

EEnet resistor model?

Category: Functional Verification

AmsDmv issue with measured results field

Category: Functional Verification

AmsDmv command line problems

Category: Functional Verification