Mixed-Signal Design

Latest Posts

Discussion

PSS not converging while running Phase Noise simulation for PFD + Charge-Pump

Category: Mixed-Signal Design

By subhadeepdatta
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updated over 5 years ago by FormerMember

3 replies • 14927 views
Discussion

Transimpedance Ampifier - Input Referred Noise Current Density

Category: Mixed-Signal Design

By growingmind
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updated over 5 years ago by Andrew Beckett

6 replies • 10426 views
Discussion

measurements on spectrum

Category: Mixed-Signal Design

By vamshiky
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updated over 5 years ago by vamshiky

2 replies • 17774 views
Discussion

Define a node as Hi Z in verilog-A

Category: Mixed-Signal Design

By bikram94
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updated over 5 years ago by FormerMember

7 replies • 22481 views
Discussion

A VerilogA Synchronous Waveform Generator

Category: Mixed-Signal Design

By FAwqati
•
updated over 5 years ago by Andrew Beckett

4 replies • 15067 views
Discussion

Using "cross" function (or an equivalent) in AC sim

Category: Mixed-Signal Design

By rushil
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updated over 5 years ago by rushil

2 replies • 11145 views
Discussion

adexl corner simulations

Category: Mixed-Signal Design

By paulinho
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updated over 5 years ago by FormerMember

9 replies • 19581 views
Discussion

AMS simulation speed

Category: Mixed-Signal Design

By Mostafa A
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updated over 5 years ago by Ring Lewis

3 replies • 14599 views
Discussion

cadence virtuoso practical manual for sigma delta design

Category: Mixed-Signal Design

By robert 21
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updated over 5 years ago by FormerMember

1 replies • 17427 views
Discussion

Verilog AMS: Is there a easy way to delete the last "\n" of a string

Category: Mixed-Signal Design

By Ring Lewis
•
started over 5 years ago

0 replies • 1038 views
Discussion

*E,CUBSPA Assignment of string to real or integer type parameter

Category: Mixed-Signal Design

By tpungi
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updated over 5 years ago by Andrew Beckett

3 replies • 3131 views
Discussion

How to increase Cadence Spectre simulation speed?

Category: Mixed-Signal Design

By birjit
•
started over 5 years ago

0 replies • 12935 views
Discussion

Simulating VAMS + Spectre netlist using xrun

Category: Mixed-Signal Design

By tpungi
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started over 5 years ago

0 replies • 13194 views
Discussion

DRC Error - "p substrate stamp error mult" and "p substrate stamp error connect" in gpdk 90

Category: Mixed-Signal Design

By Jayanta
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updated over 5 years ago by Jayanta

4 replies • 19661 views
Discussion

Correct way to model noise in a VCO in verilog-A

Category: Mixed-Signal Design

By ddkdd
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updated over 5 years ago by FormerMember

5 replies • 21591 views

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