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Mixed-Signal Design

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  • Discussion

    Using "cross" function (or an equivalent) in AC sim

    Category: Mixed-Signal Design

    By rushil

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    updated over 4 years ago by rushil

    2 replies • 10319 views
  • Discussion

    adexl corner simulations

    Category: Mixed-Signal Design

    By paulinho

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    updated over 4 years ago by FormerMember

    9 replies • 18516 views
  • Discussion

    AMS simulation speed

    Category: Mixed-Signal Design

    By Mostafa A

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    updated over 4 years ago by Ring Lewis

    3 replies • 13928 views
  • Discussion

    cadence virtuoso practical manual for sigma delta design

    Category: Mixed-Signal Design

    By robert 21

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    updated over 4 years ago by FormerMember

    1 replies • 16498 views
  • Discussion

    Verilog AMS: Is there a easy way to delete the last "\n" of a string

    Category: Mixed-Signal Design

    By Ring Lewis

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    started over 4 years ago

    0 replies • 962 views
  • Discussion

    *E,CUBSPA Assignment of string to real or integer type parameter

    Category: Mixed-Signal Design

    By tpungi

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    updated over 4 years ago by Andrew Beckett

    3 replies • 2945 views
  • Discussion

    How to increase Cadence Spectre simulation speed?

    Category: Mixed-Signal Design

    By birjit

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    started over 4 years ago

    0 replies • 12301 views
  • Discussion

    Simulating VAMS + Spectre netlist using xrun

    Category: Mixed-Signal Design

    By tpungi

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    •

    started over 4 years ago

    0 replies • 12609 views
  • Discussion

    DRC Error - "p substrate stamp error mult" and "p substrate stamp error connect" in gpdk 90

    Category: Mixed-Signal Design

    By Jayanta

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    updated over 4 years ago by Jayanta

    4 replies • 18607 views
  • Discussion

    Correct way to model noise in a VCO in verilog-A

    Category: Mixed-Signal Design

    By ddkdd

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    updated over 4 years ago by FormerMember

    5 replies • 20391 views
  • Discussion

    Referance and fractional spur modeling of PLL in verilog ams

    Category: Mixed-Signal Design

    By ddkdd

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    updated over 4 years ago by Andrew Beckett

    1 replies • 12964 views
  • Discussion

    Verilog AMS extracton issue

    Category: Mixed-Signal Design

    By ddkdd

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    •

    updated over 4 years ago by ddkdd

    10 replies • 17096 views
  • Discussion

    Transfer Layout from Innovus to Virtuoso: Layout pins issue (interoperable between Innovus and Virtuoso using OpenAccess)

    Category: Mixed-Signal Design

    By ayande1370

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    •

    started over 4 years ago

    0 replies • 12229 views
  • Discussion

    straight line (best) fit using viva calculator

    Category: Mixed-Signal Design

    By vamshiky

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    •

    updated over 4 years ago by Hannahyrh

    18 replies • 33062 views
  • Discussion

    Using wave spec for model validation

    Category: Mixed-Signal Design

    By juanbaudino

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    •

    updated over 4 years ago by juanbaudino

    3 replies • 13256 views
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